US4922139A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Filter circuit for generating a VCO control voltage responsive to the output signals from a frequency/phase discriminator
Assignee: TDK Micronas GmbH
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Filing: 1989-02-21
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Granted: 1990-05-01
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Expires: 2009-02-21
Abstract
Abstract A filter circuit is driven by two digital phase responsive output signals from the frequency/phase discriminator of a phase-locked loop (PLL) circuit. The controlled current paths of a first n-conducting transistor, a second n-conducting transistor, a second p-conducting transistor and a first p-conducting transistor are connected in that order between the plus and minus poles of a source of supply voltage. The common connection between the controlled current paths of the second n-conducting transistor and the second p-conducting transistor is connected to the output of the filter circuit. The second n-conducting transistor and the second p-conducting transistor are connected as diodes with the gate of the second n-conducting transistor connected to the common connection between the first n-conducting transistor and the second n-conducting transistor, and with the gate of the second p-conducting transistor connected to the common connection between the first p-conducting transistor and the second p-conducting transistor. The output of the filter circuit is connected across a series RC circuit to the minus pole of the source of supply voltage. The first digital signal from the frequency/phase discriminator is fed to the gate of the second n-conducting transistor via a capacitor. The second digital signal from the frequency/phase discriminator is fed to the gate of the second p-conducting transistor via the series arrangement of an inverter and a capacitor. The gate of the first n-conducting transistor and the gate of the first p-conducting transistor are applied to the common connection of the resistor and the capacitor of the RC circuit. In that way the range of control of the output voltage from the filter circuit is substantially greater than that of the supply voltage, and the coupling-in of the two digital signals to the output voltage is substantially avoided.
Inventors
- 👤 Burkhard Giebel
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 21:12
CPC Classifications
H; H03; H03L; H03L7/00; H03L7/06; H03L7/08; H03L7/085; H03L7/089; H03L7/0891; H03L7/0895
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
689 words
A filter circuit for a digital phase-locked loop (PLL) circuit, said filter circuit receiving first and second digital signals from a digital frequency/phase discriminator responsive to the phase relationship between two periodic input signals applied to said digital frequency/phase discriminator, said filter circuit providing a smoothed output voltage on an output terminal for controlling a voltage controlled oscillator, said filter circuit comprising: a first n-conducting transistor having a control terminal and a current path controlled by said control terminal, said controlled current path having first and second ends, said first end of said controlled current path of said first n-conducting transistor connected to the plus pole of a source of supply voltage; a first p-conducting transistor having a control terminal and a current path controlled by said control terminal, said controlled current path having first and second ends, said second end of said controlled current path of said first p-conducting transistor connected to the minus pole of said source of supply voltage; a second n-conducting transistor having a control terminal and a current path controlled by said control terminal, said controlled current path having first and second ends, said first end of said controlled current path of said second n-conducting transistor connected to said second end of said controlled current path of said first n-conducting transistor, said second end of said controlled current path of said second n-conducting transistor connected to said output terminal of said filter circuit, said control terminal of said second n-conducting transistor connected to said second end of said controlled current path of said first n-conducting transistor and to said first end of said controlled current path of said second n-conducting transistor so that said second n-conducting transistor operates as a diode; a second p-conducting transistor having a control terminal and a current path controlled by said control terminal, said controlled current path having first and second ends, said second end of said controlled current path of said second p-conducting transistor connected to said first end of said controlled current path of said first p-conducting transistor, said first end of said controlled current path of said second p-conducting transistor connected to said output terminal of said filter circuit, said control terminal of said second p-conducting transistor connected to said first end of said controlled current path of said first p-conducting transistor and to said second end of said controlled current path of said second p-conducting transistor so that said second p-conducting transistor operates as a diode; a series RC circuit comprising a resistor and a capacitor each having respective first and second terminals, said first terminal of said resistor connected to said output terminal of said filter circuit, said second terminal of said resistor connected to said first terminal of said capacitor, said second terminal of said capacitor connected to said minus pole of said source of supply voltage, said second terminal of said resistor and said first terminal of said capacitor connected to said control terminals of said first n-conducting transistor and said first p-conducting transistor; a first input terminal for receiving said first digital signal from said frequency/phase discriminator indicative of a first phase relationship between said periodic input signals applied to said frequency/phase discriminator; a second input terminal for receiving a second digital signal from said frequency/phase discriminator indicative of a second phase relationship between said periodic input signals applied to said frequency/phase discriminator; a capacitor connected between said first input terminal and said control terminal of said second n-conducting transistor to provide a signal responsive to said first digital signal to said control terminal of said second n-conducting transistor, said second n-conducting transistor conducting current to increase the voltage on said output terminal of said filter circuit in response to said first phase relationship; and an inverter and a capacitor connected in series between said second input terminal and said control terminal of said second p-conducting transistor to provide a signal responsive to said second digital signal to said control terminal of said second p-conducting transistor, said second p-conducting transistor conducting current to decrease the voltage on said output terminal of said filter circuit in response to said second phase relationship.
Claim 2
Dependent Claim
689 words
A filter circuit for a digital phase-locked loop (PLL) circuit, said filter circuit receiving first and second digital signals from a digital frequency/phase discriminator responsive to the phase relationship between two periodic input signals applied to said digital frequency/phase discriminator, said filter circuit providing a smoothed output voltage on an output terminal for controlling a voltage controlled oscillator, said filter circuit comprising: a first n-conducting transistor having a control terminal and a current path controlled by said control terminal, said controlled current path having first and second ends, said first end of said controlled current path of said first n-conducting transistor connected to the plus pole of a source of supply voltage; a first p-conducting transistor having a control terminal and a current path controlled by said control terminal, said controlled current path having first and second ends, said second end of said controlled current path of said first p-conducting transistor connected to the minus pole of said source of supply voltage; a second n-conducting transistor having a control terminal and a current path controlled by said control terminal, said controlled current path having first and second ends, said first end of said controlled current path of said second n-conducting transistor connected to said second end of said controlled current path of said first n-conducting transistor, said second end of said controlled current path of said second n-conducting transistor connected to said output terminal of said filter circuit, said control terminal of said second n-conducting transistor connected to said second end of said controlled current path of said first n-conducting transistor and to said first end of said controlled current path of said second n-conducting transistor so that said second n-conducting transistor operates as a diode; a second p-conducting transistor having a control terminal and a current path controlled by said control terminal, said controlled current path having first and second ends, said second end of said controlled current path of said second p-conducting transistor connected to said first end of said controlled current path of said first p-conducting transistor, said first end of said controlled current path of said second p-conducting transistor connected to said output terminal of said filter circuit, said control terminal of said second p-conducting transistor connected to said first end of said controlled current path of said first p-conducting transistor and to said second end of said controlled current path of said second p-conducting transistor so that said second p-conducting transistor operates as a diode; a series RC circuit comprising a resistor and a capacitor each having respective first and second terminals, said first terminal of said resistor connected to said output terminal of said filter circuit, said second terminal of said resistor connected to said first terminal of said capacitor, said second terminal of said capacitor connected to said minus pole of said source of supply voltage, said second terminal of said resistor and said first terminal of said capacitor connected to said control terminals of said first n-conducting transistor and said first p-conducting transistor; a first input terminal for receiving said first digital signal from said frequency/phase discriminator indicative of a first phase relationship between said periodic input signals applied to said frequency/phase discriminator; a second input terminal for receiving a second digital signal from said frequency/phase discriminator indicative of a second phase relationship between said periodic input signals applied to said frequency/phase discriminator; a capacitor connected between said first input terminal and said control terminal of said second n-conducting transistor to provide a signal responsive to said first digital signal to said control terminal of said second n-conducting transistor, said second n-conducting transistor conducting current to increase the voltage on said output terminal of said filter circuit in response to said first phase relationship; and an inverter and a capacitor connected in series between said second input terminal and said control terminal of said second p-conducting transistor to provide a signal responsive to said second digital signal to said control terminal of said second p-conducting transistor, said second p-conducting transistor conducting current to decrease the voltage on said output terminal of said filter circuit in response to said second phase relationship.
Claim 3
Dependent Claim
440 words
A filter circuit for a digital phase-locked loop (PLL) circuit, said filter circuit receiving first and second digital signals from a digital frequency/phase discriminator responsive to the phase relationship between two periodic input signals applied to said digital frequency/phase discriminator, said filter circuit providing a smoothed output voltage on an output terminal for controlling a voltage controlled oscillator, said filter circuit comprising: a first transistor having a control terminal and a current path controlled by said control terminal, said controlled current path having first and second ends, said first end of said controlled current path of said first transistor connected to a source of a positive supply voltage; a second transistor having a control terminal and a current path controlled by said control terminal, said controlled current path having first and second ends, said second end of said controlled current path of said first transistor connected to a reference voltage that is negative with respect to said positive supply voltage; a first diode-resistance circuit connected between said first transistor and said output terminal of said filter circuit; a second diode-resistance circuit connected between said second transistor and said output terminal of said filter circuit; a series RC circuit comprising a resistor and a capacitor each having respective first and second terminals, said first terminal of said resistor connected to said output terminal of said filter circuit, said second terminal of said resistor connected to said first terminal of said capacitor, said second terminal of said capacitor connected to said minus pole of said source of supply voltage, said second terminal of said resistor and said first terminal of said capacitor connected to said control terminals of said first transistor and said second transistor; a first input terminal for receiving said first digital signal from said frequency/phase discriminator indicative of a first phase relationship between said periodic input signals to said frequency/phase discriminator; a second input terminal for receiving said second digital signal from said frequency/phase discriminator indicative of a second phase relationship between said periodic input signals to said frequency/phase discriminator; a first coupling capacitor connected between said first input terminal and said first diode-resistance circuit, said first coupling capacitor and said first diode-resistance circuit coupling said first digital signal to said output terminal of said filter circuit to increase said output voltage in response to said first phase relationship; and a second coupling capacitor connected between said second input terminal and said second diode-resistance circuit, said second coupling capacitor and said second diode-resistance circuit coupling said second digital signal to said output terminal of said filter circuit to decrease said output voltage in response to said second phase relationship.
Claim 4
Dependent Claim
440 words
A filter circuit for a digital phase-locked loop (PLL) circuit, said filter circuit receiving first and second digital signals from a digital frequency/phase discriminator responsive to the phase relationship between two periodic input signals applied to said digital frequency/phase discriminator, said filter circuit providing a smoothed output voltage on an output terminal for controlling a voltage controlled oscillator, said filter circuit comprising: a first transistor having a control terminal and a current path controlled by said control terminal, said controlled current path having first and second ends, said first end of said controlled current path of said first transistor connected to a source of a positive supply voltage; a second transistor having a control terminal and a current path controlled by said control terminal, said controlled current path having first and second ends, said second end of said controlled current path of said first transistor connected to a reference voltage that is negative with respect to said positive supply voltage; a first diode-resistance circuit connected between said first transistor and said output terminal of said filter circuit; a second diode-resistance circuit connected between said second transistor and said output terminal of said filter circuit; a series RC circuit comprising a resistor and a capacitor each having respective first and second terminals, said first terminal of said resistor connected to said output terminal of said filter circuit, said second terminal of said resistor connected to said first terminal of said capacitor, said second terminal of said capacitor connected to said minus pole of said source of supply voltage, said second terminal of said resistor and said first terminal of said capacitor connected to said control terminals of said first transistor and said second transistor; a first input terminal for receiving said first digital signal from said frequency/phase discriminator indicative of a first phase relationship between said periodic input signals to said frequency/phase discriminator; a second input terminal for receiving said second digital signal from said frequency/phase discriminator indicative of a second phase relationship between said periodic input signals to said frequency/phase discriminator; a first coupling capacitor connected between said first input terminal and said first diode-resistance circuit, said first coupling capacitor and said first diode-resistance circuit coupling said first digital signal to said output terminal of said filter circuit to increase said output voltage in response to said first phase relationship; and a second coupling capacitor connected between said second input terminal and said second diode-resistance circuit, said second coupling capacitor and said second diode-resistance circuit coupling said second digital signal to said output terminal of said filter circuit to decrease said output voltage in response to said second phase relationship.
Claim 5
Dependent Claim
64 words
The filter circuit as defined in claim 2, wherein said first diode resistance circuit is an n-conducting transistor having a control terminal and a current path having first and second ends, said control terminal being connected to one of said first and second ends to cause said n-conducting transistor to operate as a diode in series with the on resistance of said n-conducting transistor.
Claim 6
Dependent Claim
64 words
The filter circuit as defined in claim 2, wherein said second diode resistance circuit is a p-conducting transistor having a control terminal and a current path having first and second ends, said control terminal being connected to one of said first and second ends to cause said p-conducting transistor to operate as a diode in series with the on resistance of said p-conducting transistor.
Claim 7
Dependent Claim
16 words
The filter circuit as defined in claim 2, wherein said first transistor is an n-conducting transistor.
Claim 8
Dependent Claim
16 words
The filter circuit as defined in claim 2, wherein said second transistor is a p-conducting transistor.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-04-30 | 1993-10-30 | 1994-05-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-04-30 | 1997-10-30 | 1998-05-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-04-30 | 2001-10-30 | 2002-05-01 | $7700.00 | Window Closed / Lapsed |