Vector generator scan converter

Claim 2

A vector generator scan converter, comprising: input interface means for receiving compressed graphics data; a microprocessor connected to the input interface means; a working memory connected to the microprocessor; a microcode memory connected to the microprocessor and containing a set of instructions for operating the microprocessor, including receiving and storing the compressed graphics data in the working memory, and calculating vector slopes and lengths from the compressed data; a vector generator means connected to the microprocessor for constructing vectors from vector starting points, slopes and lengths received from the microprocessor to produce a full graphic image from the compressed graphics data; at least one image buffer memory connected to the vector generator means for storing the full graphic image produced by the vector generator means; output interface means responsive to the microprocessor for outputting the full graphic images from the image buffer memory; wherein the vector generator means comprises: an X counter for storing a value of an X-coordinate of a vector; a Y counter for storing a value of a Y-coordinate of a vector; a slope register for storing a value of a vector slope; an adder having one input connected to the slope register; an accumulator connected to the output of the adder and being connected to a second input of the adder, the accumulator being connected to the X and Y counters to increment the counters to reconstruct a vector image.

Claim 3

The converter of claim 1 comprising two image buffer memories connected in parallel to the vector generator means for storing alternate pages of graphic images.

Claim 4

The converter of claim 1 wherein the output interface means comprises an output scanner for reading an entire image from an image buffer memory in a predetermined pattern and interface means which stores portions of the image read by the output scanner until read by the laser printer.

Claim 5

The converter of claim 1 wherein each image buffer memory is a DRAM.

Claim 6

The converter of claim 1 wherein the working memory is a SRAM.

Claim 7

The converter of claim 1 wherein the microprocessor includes an AMD-2901 arithmetic logic unit.

Claim 8

The converter of claim 6 further comprising a pipeline register between the microcode memory and the arithmetic logic unit.

Claim 9

The converter of claim 7 further comprising an AMD-2901 sequencer connected from the pipeline register to the microcode memory.

Claim 10

A computer-printer system, comprising: a main processor which produces graphics data in a compressed format as vector end points; a control processor; a high speed laser printer having an I/O port; a standard I/O channel connecting the main processor and control processor to the laser printer I/O port; a raster data input port in the laser printer; at least one microcoded microprocessor based vector generator scan converter connected from the I/O channel to the raster data input port to receive vector end points over the I/O channel, convert the end points to vectors in a bit-mapped graphic image, and output the bit-mapped graphic image to the raster data input port of the laser printer; wherein each vector generator scan converter comprises: input means for receiving compressed graphics data from the main processor over the I/O channel; a microprocessor connected to the input means; a working memory connected to the microprocessor; a microcode memory connected to the microprocessor and containing a set of instructions for operating the microprocessor, including receiving and storing the compressed graphics data in the working memory, and calculating vector slopes and lengths from the compressed data; a vector generator means connected to the microprocessor for constructing vectors from vector starting points, slopes and lengths received from the microprocessor to produce a full graphic image from the compressed graphics data; at least one image buffer memory connected to the vector generator means for storing the full graphic image produced by the vector generator means; output means responsive to the microprocessor for outputting the graphic images from the image buffer memory to the laser printer through the raster data input port; wherein the vector generator means comprises: an X counter for storing a value of an X-coordinate of a vector; a Y counter for storing a value of a Y-coordinate of a vector; a slope register for storing the value of a vector slope; an adder having one input connected to the slope register; an accumulator connected to the output of the adder and being connected to a second input of the adder, the accumulator being connected to the X and Y counters to increment the counters to reconstruct a vector image.

Claim 11

A computer-printer system, comprising: a main processor which produces graphics data in a compressed format as vector end points; a control processor; a high speed laser printer having an I/O port; a standard I/O channel connecting the main processor and control processor to the laser printer I/O port; a raster data input port in the laser printer; at least one microcoded microprocessor based vector generator scan converter connected from the I/O channel to the raster data input port to receive vector end points over the I/O channel, convert the end points to vectors in a bit-mapped graphic image, and output the bit-mapped graphic image to the raster data input port of the laser printer; wherein each vector generator scan converter comprises: input means for receiving compressed graphics data from the main processor over the I/O channel; a microprocessor connected to the input means; a working memory connected to the microprocessor; a microcode memory connected to the microprocessor and containing a set of instructions for operating the microprocessor, including receiving and storing the compressed graphics data in the working memory, and calculating vector slopes and lengths from the compressed data; a vector generator means connected to the microprocessor for constructing vectors from vector starting points, slopes and lengths received from the microprocessor to produce a full graphic image from the compressed graphics data; at least one image buffer memory connected to the vector generator means for storing the full graphic image produced by the vector generator means; output means responsive to the microprocessor for outputting the graphic images from the image buffer memory to the laser printer through the raster data input port; wherein the vector generator means comprises: an X counter for storing a value of an X-coordinate of a vector; a Y counter for storing a value of a Y-coordinate of a vector; a slope register for storing the value of a vector slope; an adder having one input connected to the slope register; an accumulator connected to the output of the adder and being connected to a second input of the adder, the accumulator being connected to the X and Y counters to increment the counters to reconstruct a vector image.

Claim 12

The system of claim 9 comprising two vector generator scan converters connected in parallel from the I/O channel to the raster data input port for processing alternate pages of graphics data.

Claim 13

A vector generator scan converter, comprising: input interface means for receiving compressed graphics data; a microprocessor connected to the input interface means, the microprocessor including and AMD-2901 arithmetic logic unit; a working memory connected to the microprocessor; a microcode memory connected to the microprocessor and containing a set of instructions for operating the microprocessor, including receiving and storing the compressed graphics data in the working memory, and calculating vector slopes and lengths from the compressed data; a pipeline register between the microcode memory and the arithmetic logic unit; a vector generator means connected to the microprocessor for constructing vectors from vector starting points, slopes and lengths received from the microprocessor to produce a fully graphic image from the compressed graphics data; at least one image buffer memory connected to the vector generator means for storing the full graphic image produced by the vector generator means; output interface means responsive to the microprocessor for outputting the full graphic images from the image buffer memory.

Claim 14

A vector generator scan converter, comprising: input interface means for receiving compressed graphics data; a microprocessor connected to the input interface means, the microprocessor including and AMD-2901 arithmetic logic unit; a working memory connected to the microprocessor; a microcode memory connected to the microprocessor and containing a set of instructions for operating the microprocessor, including receiving and storing the compressed graphics data in the working memory, and calculating vector slopes and lengths from the compressed data; a pipeline register between the microcode memory and the arithmetic logic unit; a vector generator means connected to the microprocessor for constructing vectors from vector starting points, slopes and lengths received from the microprocessor to produce a fully graphic image from the compressed graphics data; at least one image buffer memory connected to the vector generator means for storing the full graphic image produced by the vector generator means; output interface means responsive to the microprocessor for outputting the full graphic images from the image buffer memory.

Claim 15

The converter of claim 18 further comprising an AMD-2910 sequencer connected from the pipeline register to the microcode memory.