Patent US2660485A successfully refreshed from Google Patents.
US4916518A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Plastic encapsulated semiconductor device and method for manufacturing the same
Assignee: Toshiba Corp
•
Filing: 1984-01-24
•
Granted: 1990-04-10
•
Expires: 2004-01-24
Abstract
Abstract A semiconductor device has a lead frame. The lead frame has a mount portion and a lead portion. A semiconductor chip is mounted on one major surface of the mount portion of the lead frame. The semiconductor chip is connected by an electrical connecting means to the lead portion of the lead frame. An electrical insulating layer is formed on the other major surface of the mount portion of the lead frame. The mount portion, part of the lead portion of the lead frame, the semiconductor chip and the electrically connecting means, excluding the surface of the electrical insulating layer of the mount portion of the lead frame, are sealed or encapsulated by an electrical insulating member.
Inventors
- 👤 Yutaka Yoshimura
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 20:49
CPC Classifications
H; H10; H10W; H10W72/00; H10W70/00; H10W70/40; H10W70/481; H10W70/461; H10W74/00; H10W74/01; H10W74/016; H10W72/50; H10W72/541; H10W72/5449; H10W72/551; H10W72/552; H10W72/5524; H10W90/00; H10W90/701; H10W90/751; H10W90/756; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49121
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
174 words
A semiconductor device comprising: a lead frame having a mount portion and a lead portion connected to said mount portion, said mount portion having a mount surface and a heat dissipation surface, said mount surface positioned substantially adjacent said heat dissipation surface, said mount surface and said heat dissipation surface facing substantially opposite directions along said lead frame; a semiconductor chip mounted on said mount surface; wiring means extending between said semiconductor chip and said lead portion for electrically connecting said semiconductor chip to said lead portion; a resinous electrical insulation layer affixed to said heat dissipation surface for dissipating most of the heat generated by said semiconductor chip; and resin means encapsulating said mount surface, said semiconductor chip, and said lead portion proximate said mount portion for sealing and for insulating the encapsulated portions of the semiconductor device wherein said resin means is formed to abut said insulation layer, and wherein said resin means and said insulation layer define a package encapsulating said mount portion and said lead portion proximate said mount portion.
Claim 2
Dependent Claim
174 words
A semiconductor device comprising: a lead frame having a mount portion and a lead portion connected to said mount portion, said mount portion having a mount surface and a heat dissipation surface, said mount surface positioned substantially adjacent said heat dissipation surface, said mount surface and said heat dissipation surface facing substantially opposite directions along said lead frame; a semiconductor chip mounted on said mount surface; wiring means extending between said semiconductor chip and said lead portion for electrically connecting said semiconductor chip to said lead portion; a resinous electrical insulation layer affixed to said heat dissipation surface for dissipating most of the heat generated by said semiconductor chip; and resin means encapsulating said mount surface, said semiconductor chip, and said lead portion proximate said mount portion for sealing and for insulating the encapsulated portions of the semiconductor device wherein said resin means is formed to abut said insulation layer, and wherein said resin means and said insulation layer define a package encapsulating said mount portion and said lead portion proximate said mount portion.
Claim 3
Dependent Claim
17 words
The semiconductor device as defined in claim 1, wherein said resin means is a single resinous substance.
Claim 4
Dependent Claim
23 words
The semiconductor device as defined in claim 1, wherein said insulation layer is between about 0.1 mm and about 0.4 mm in thickness.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-04-09 | 1993-10-09 | 1994-04-10 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-04-09 | 1997-10-09 | 1998-04-10 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-04-09 | 2001-10-09 | 2002-04-10 | $7700.00 | Window Closed / Lapsed |