Digital lock-in amplifier

Claim 2

A digital lock-in amplifier, coupled to receive a reference signal, an analog input signal and a clock of a fixed period, comprising: an A/D converter which receives the analog input signal and converts it, in synchronism with the clock of a fixed period, into a digital signal expressed by a sequence of digital waveform data; local signal generating means for generating a digital sine wave local signal and a digital cosine wave local signal; frequency converting means for shifting the digital signal from said A/D converter to the difference frequency region by mixing it with each of the sine wave local signal and the cosine wave signal, and for outputting the frequency-converted digital signals as complex waveform data; trigger signal generating means for receiving the reference signal and generating a trigger signal when a predetermined requirement of the reference signal is met; frame defining means, responsive to the trigger signal, for defining a frame composed of a sequence of N successive complex waveform data in a fixed positional relation to the trigger signal, where N is a positive integer; phase latch means, responsive to the trigger signal, for latching and holding sample values of the sine wave local signal and the cosine wave local signal, as their phase information, in a fixed positional relation to the trigger signal; and phase rotating means for rotating the phase angle of the complex waveform data of the defined frame to a fixed phase angle on the basis of the phase information latched in said phase latch means.

Claim 3

The digital lock-in amplifier of claim 1, further comprising complex memory means capable of storing at least N successive complex waveform data from the frequency converting means, wherein said phase rotating means phase-rotates the complex waveform data read out of said complex memory means.

Claim 4

The digital lock-in amplifier of claim 2, wherein said frame defining means includes remaining sample counting means for defining the end of the frame by the Mth complex waveform data after receiving the trigger signal, M being an integer equal to or smaller than N.

Claim 5

The digital lock-in amplifier of claim 3, further comprising: resampling signal generating means for extracting the clock at regular intervals and outputting the clock as a resampling signal; resampling means for extracting complex waveform data from the sequence of complex waveform data from said frequency converting means for each resampling signal and providing the extracted complex waveform data to said complex memory means; and control means for controlling the read and write of said complex memory means, wherein said remaining sample counting means generates a frame end signal indicating the end of the frame by counting M resampling signals after receiving the trigger signal and said control means responds to the frame end signal to switch said complex memory means to a read mode.

Claim 6

The digital lock-in amplifier of claim 4, wherein said control means includes address generating means for counting the resampling signals and for repeatedly generating a sequence of N addresses for application to said complex memory means.

Claim 7

The digital lock-in amplifier of any one of claims 1, 2, 3, 4 and 5, further comprising waveform averaging means connected to the output of said phase rotating means, for averaging the phase-rotated complex waveform data of a predetermined number of frames.

Claim 8

A digital lock-in amplifier coupled to receive an analog input signal, a clock of a fixed period, and a reference signal, comprising: an A/D converter which receives the analog input signal and converts it, in synchronism with the clock of a fixed period, into a digital signal expressed by a sequence of digital waveform data; real memory means which has at least L storage areas for storing the sequence of digital waveform data from said A/D converting means, L being a positive integer; local signal generating means for generating a digital sine wave local signal and a digital cosine wave local signal; frequency converting means for receiving the digital signal read out of said real memory means, for shifting the digital signal to the difference frequency region by mixing it with each of the sine wave local signal and the cosine wave local signal and for outputting the frequency-converted digital signals as complex waveform data; trigger signal generating means for receiving the reference signal and generating a trigger signal when a predetermined requirement of the reference signal is met; frame defining means, responsive to the trigger signal, for defining a frame composed of a sequence of L successive digital waveform data in a fixed positional relation to the trigger signal; phase latch means responsive to the trigger signal, for latching and holding sample values of the sine wave local signal and the cosine wave local signal, as their phase information, in a fixed positional relation to the trigger signal; and phase rotating means for rotating the phase angle of the complex waveform data of the defined frame to a fixed phase angle on the basis of the phase information latched in said phase latch means.

Claim 9

A digital lock-in amplifier coupled to receive an analog input signal, a clock of a fixed period, and a reference signal, comprising: an A/D converter which receives the analog input signal and converts it, in synchronism with the clock of a fixed period, into a digital signal expressed by a sequence of digital waveform data; real memory means which has at least L storage areas for storing the sequence of digital waveform data from said A/D converting means, L being a positive integer; local signal generating means for generating a digital sine wave local signal and a digital cosine wave local signal; frequency converting means for receiving the digital signal read out of said real memory means, for shifting the digital signal to the difference frequency region by mixing it with each of the sine wave local signal and the cosine wave local signal and for outputting the frequency-converted digital signals as complex waveform data; trigger signal generating means for receiving the reference signal and generating a trigger signal when a predetermined requirement of the reference signal is met; frame defining means, responsive to the trigger signal, for defining a frame composed of a sequence of L successive digital waveform data in a fixed positional relation to the trigger signal; phase latch means responsive to the trigger signal, for latching and holding sample values of the sine wave local signal and the cosine wave local signal, as their phase information, in a fixed positional relation to the trigger signal; and phase rotating means for rotating the phase angle of the complex waveform data of the defined frame to a fixed phase angle on the basis of the phase information latched in said phase latch means.

Claim 10

The digital lock-in amplifier of claim 7, wherein said frame defining means includes remaining sample counting means for defining the end of the frame by the Mth digital waveform data after receiving the trigger signal, M being an integer equal to or greater than L.

Claim 11

The digital lock-in amplifier of claim 8, further comprising: resampling signal generating means for extracting the clock at regular intervals and outputting the clock as a resampling signal; resampling means for extracting complex waveform data from the sequence of complex waveform data from said frequency converting means for each resampling signal and for providing the extracted complex waveform data to said phase rotating means; and control means for controlling the read and write of said real memory means, wherein said remaining sample counting means generates a frame end signal immediately after the Mth digital waveform data and said control means responds to the frame end signal to switch said real memory means to a read mode.

Claim 12

The digital lock-in amplifier of claim 9, further comprising address generating means for counting the resampling signals and repeatedly generating a sequence of L addresses for application to said real memory means.

Claim 13

The digital lock-in amplifier of any one of claims 7, 8, 9 and 10, further comprising waveform averaging means, connected to the output of said phase rotating means, for averaging the phase-rotated complex waveform data of a predetermined number of frames.

Claim 14

A digital lock-in amplifier coupled to receive an analog input signal, a clock of a fixed period, and a reference signal, comprising: A/D converting means for receiving the analog input signal and converting it, in synchronism with the clock of a fixed period, into a digital signal expressed by a sequence of digital waveform data; local signal generating means for generating a digital sine wave local signal and a digital cosine wave local signal; frequency converting means for shifting the digital signal from said A/D converting means to the difference frequency region by mixing it with each of the sine wave local signal and the cosine wave local signal, and for outputting the frequency-converted digital signals as complex waveform data; trigger signal generating means for receiving the reference signal and generating a trigger signal when a predetermined requirement of the reference signal is met; frame defining means, responsive to the trigger signal, for defining a frame composed of a sequence of N pieces of complex waveform data in a fixed positional relation to the trigger signal, N being a positive integer; phase synchronizing means, responsive to the trigger signal, for synchronizing the sine wave local signal and the cosine wave local signal with the trigger signal.

Claim 15

A digital lock-in amplifier coupled to receive an analog input signal, a clock of a fixed period, and a reference signal, comprising: A/D converting means for receiving the analog input signal and converting it, in synchronism with the clock of a fixed period, into a digital signal expressed by a sequence of digital waveform data; local signal generating means for generating a digital sine wave local signal and a digital cosine wave local signal; frequency converting means for shifting the digital signal from said A/D converting means to the difference frequency region by mixing it with each of the sine wave local signal and the cosine wave local signal, and for outputting the frequency-converted digital signals as complex waveform data; trigger signal generating means for receiving the reference signal and generating a trigger signal when a predetermined requirement of the reference signal is met; frame defining means, responsive to the trigger signal, for defining a frame composed of a sequence of N pieces of complex waveform data in a fixed positional relation to the trigger signal, N being a positive integer; phase synchronizing means, responsive to the trigger signal, for synchronizing the sine wave local signal and the cosine wave local signal with the trigger signal.

Claim 16

The digital lock-in amplifier of claim 12, wherein said local signal generating means includes: first and second memories having stored therein digital sample values of the sine wave local signal and the cosine wave local signal, respectively; and address generating means for accumulating a predetermined value for each clock, for repeating the accumulation until the accumulated value exceeds a predetermined value and, for each accumulation, providing the accumulated value as an address to each of said first and second memories, wherein said phase synchronizing means resets the address generated by said address generating means to a fixed initial value.

Claim 17

The digital lock-in amplifier of claim 12, wherein said frame defining means includes frame sample counting means for defining the end of the frame by the Nth complex waveform data after receiving the trigger signal.

Claim 18

The digital lock-in amplifier of claim 14, further comprising: resampling signal generating means for extracting the clock at regular intervals and outputting it as a resampling signal; and resampling means for extracting complex waveform data from the sequence of complex waveform data and outputting it for each resampling signal, and wherein said frame sample counting means defines the end of the frame by counting N resampling signals after receiving the trigger signal.

Claim 19

The digital lock-in amplifier of claim 15, further comprising waveform averaging means connected to the output of said resampling means, for averaging the complex waveform data of a predetermined number of frames.

Claim 20

A digital lock-in amplifier coupled to receive an analog input signal, a clock of a fixed period, and a reference signal, comprising: A/D converting means for receiving the analog input signal and converting it, in synchronism with the clock of a fixed period, into a digital signal expressed by a sequence of digital waveform data; real memory means which has at least L storage areas for storing the sequence of digital waveform data from said A/D converting means, L being a positive integer; local signal generating means for generating a digital sine wave local signal and a digital cosine wave local signal; frequency converting means for receiving the digital signal read out of said real memory means, for shifting the digital signal to the difference frequency region by mixing it with each of the sine wave local signal and the cosine wave local signal, and for outputting the frequency-converted digital signals as complex waveform data; trigger signal generating means for receiving the reference signal and generating a trigger signal when a predetermined requirement of the reference signal is met; frame defining means, responsive to the trigger signal, for defining a frame composed of a sequence of L successive digital waveform data in a fixed positional relation to the trigger signal; and phase synchronizing means, responsive to the trigger signal, for synchronizing the sine wave local signal and the cosine wave local signal with the trigger signal.

Claim 21

A digital lock-in amplifier coupled to receive an analog input signal, a clock of a fixed period, and a reference signal, comprising: A/D converting means for receiving the analog input signal and converting it, in synchronism with the clock of a fixed period, into a digital signal expressed by a sequence of digital waveform data; real memory means which has at least L storage areas for storing the sequence of digital waveform data from said A/D converting means, L being a positive integer; local signal generating means for generating a digital sine wave local signal and a digital cosine wave local signal; frequency converting means for receiving the digital signal read out of said real memory means, for shifting the digital signal to the difference frequency region by mixing it with each of the sine wave local signal and the cosine wave local signal, and for outputting the frequency-converted digital signals as complex waveform data; trigger signal generating means for receiving the reference signal and generating a trigger signal when a predetermined requirement of the reference signal is met; frame defining means, responsive to the trigger signal, for defining a frame composed of a sequence of L successive digital waveform data in a fixed positional relation to the trigger signal; and phase synchronizing means, responsive to the trigger signal, for synchronizing the sine wave local signal and the cosine wave local signal with the trigger signal.

Claim 22

The digital lock-in amplifier of claim 17, wherein said local signal generating means includes: first and second memories having stored therein digital sample values of the sine wave local signal wave local signal, respectively; and address generating means for accumulating a predetermined value for each clock, for repeating the accumulation until the accumulated value exceeds a predetermined value and, for each accumulation, providing the accumulated value as an address to each of said first and second memories, wherein said phase synchronizing means resets the address generated by said address generating means to a fixed initial value.

Claim 23

The digital lock-in amplifier of claim 17, wherein said frame defining means includes remaining sample counting means for defining the end of the frame by the Mth digital waveform data after receiving the trigger signal, M being an integer equal to or greater than L.

Claim 24

The digital lock-in amplifier of claim 19, further comprising: resampling signal generating means for extracting the clock at regular intervals and outputting it as a resampling signal; resampling means for extracting complex waveform data from the sequence of complex waveform data from said frequency converting means and outputting it for each resampling signal; and control means for controlling the read and write of said real memory means, wherein said remaining sample counting means generates a frame end signal immediately after the Mth digital waveform data and said control means responds to the frame end signal to switch said real memory means to a read mode.

Claim 25

The digital lock-in amplifier of claim 20, further comprising real memory address generating means for counting the clock and repeatedly generating a sequence of L addresses for application to said real memory means.

Claim 26

The digital lock-in amplifier of claim 20 or 21, further including waveform averaging means connected to the output of said resampling means, for averaging the complex waveform data of a predetermined number of frames to produce averaged complex waveform data as an output.

Claim 27

A digital lock-in amplifier, coupled to receive an analog input signal, comprising: an A/D converter, coupled to receive the analog input signal, for converting the analog input signal into a digital signal; a sine wave generator for generating a sine wave local signal; a cosine wave generator for generating a cosine wave local signal; a first digital frequency converter, coupled to said sine wave generator and said A/D converter for mixing the digital signal with the sine wave local signal and for outputting a first frequency-converted digital signal; a second digital frequency converter, coupled to said cosine wave generator and said A/D converter, for mixing the digital signal with the cosine wave local signal and for outputting a second frequency-converted digital signal, the first and second frequency-converted digital signals forming complex waveform data; a trigger circuit for generating a trigger signal; a frame sample counter, coupled to said trigger circuit, for defining a frame composed of a sequence of N successive complex waveform data, wherein N is a positive integer; a phase latch, coupled to said trigger circuit and to said sine and cosine wave generators, for latching and holding sample values of the sine wave local signal and the cosine wave local signal in a fixed positional relation to the trigger signal; and means for rotating the phase angle of the complex waveform data of the frame defined by said frame sample counter to a fixed phase angle on the basis of the phase information latched in said phase latch.

Claim 28

A digital lock-in amplifier, coupled to receive an analog input signal, comprising: an A/D converter, coupled to receive the analog input signal, for converting the analog input signal into a digital signal; a sine wave generator for generating a sine wave local signal; a cosine wave generator for generating a cosine wave local signal; a first digital frequency converter, coupled to said sine wave generator and said A/D converter for mixing the digital signal with the sine wave local signal and for outputting a first frequency-converted digital signal; a second digital frequency converter, coupled to said cosine wave generator and said A/D converter, for mixing the digital signal with the cosine wave local signal and for outputting a second frequency-converted digital signal, the first and second frequency-converted digital signals forming complex waveform data; a trigger circuit for generating a trigger signal; a frame sample counter, coupled to said trigger circuit, for defining a frame composed of a sequence of N successive complex waveform data, wherein N is a positive integer; a phase latch, coupled to said trigger circuit and to said sine and cosine wave generators, for latching and holding sample values of the sine wave local signal and the cosine wave local signal in a fixed positional relation to the trigger signal; and means for rotating the phase angle of the complex waveform data of the frame defined by said frame sample counter to a fixed phase angle on the basis of the phase information latched in said phase latch.