Patent US5471613A successfully refreshed from Google Patents.
Patent US2504332A successfully refreshed from Google Patents.
US4909602A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Liquid crystal display and method of driving the same
Assignee: Hitachi Ltd
•
Filing: 1988-04-19
•
Granted: 1990-03-20
•
Expires: 2008-04-19
Abstract
Abstract An active matrix liquid crystal display is disclosed in which a better image quality is obtained by specifying a relation between voltages applied to the liquid crystal display. Also, a better holding characteristic is obtained by selecting the channel resistance R OFF of a thin film transistor in its OFF state to be not smaller than 10 12 Ω.
Inventors
- 👤 Yoshiyuki Kaneko
- 👤 Akira Sasano
- 👤 Toshihisa Tsukada
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 23:49
CPC Classifications
G; G02; G02F; G02F1/00; G02F1/01; G02F1/13; G02F1/133; G02F1/136; G02F1/1362; G02F1/1368; G09; G09G; G09G3/00; G09G3/20; G09G3/34; G09G3/36; G09G3/3611; G09G3/3648; G09G2320/00; G09G2320/02; G09G2320/0209; G09G2320/0214; G09G2320/0219
Claims Analysis
Total Claims: 15
Claim 1
Independent Claim
213 words
A liquid crystal display comprising: a first substrate including thereon a plurality of data lines, a plurality of gates lines crossing said data lines, a plurality of pixel electrodes disposed at respective crossing portions of said data lines and said gate lines, and a plurality of insulated gate thin film transistors disposed at said crossing portions, each of said thin film transistors being connected between an associated one of the pixel electrodes and an associated one of the data lines and having a gate connected to an associated one of the gate lines, wherein the each of said transistors is turned on when a gate voltage higher than a predetermined threshold value is applied to the gate; a second substrate facing to said first substrate and including a transparent conductor formed on its surface; a layer of liquid crystal sandwiched between said first and second substrates so as to provide pixels at the respective crossing portions in cooperation with said pixel electrodes; means for selectively applying a data voltage to each of said data lines; and, means for selectively applying a gate voltage to each of said gate lines, said gate voltage being higher than a sum of a maximum value of the data voltage and the threshold value for the gate voltage.
Claim 2
Dependent Claim
213 words
A liquid crystal display comprising: a first substrate including thereon a plurality of data lines, a plurality of gates lines crossing said data lines, a plurality of pixel electrodes disposed at respective crossing portions of said data lines and said gate lines, and a plurality of insulated gate thin film transistors disposed at said crossing portions, each of said thin film transistors being connected between an associated one of the pixel electrodes and an associated one of the data lines and having a gate connected to an associated one of the gate lines, wherein the each of said transistors is turned on when a gate voltage higher than a predetermined threshold value is applied to the gate; a second substrate facing to said first substrate and including a transparent conductor formed on its surface; a layer of liquid crystal sandwiched between said first and second substrates so as to provide pixels at the respective crossing portions in cooperation with said pixel electrodes; means for selectively applying a data voltage to each of said data lines; and, means for selectively applying a gate voltage to each of said gate lines, said gate voltage being higher than a sum of a maximum value of the data voltage and the threshold value for the gate voltage.
Claim 3
Dependent Claim
63 words
A liquid crystal display according to claim 1, wherein a value of the gate voltage to turn said thin film transistor off is smaller than the subtraction of the value of the voltage drop at the pixel electrode upon transition from an ON state of said thin film transistor to an OFF state thereof from the minimum value of said data signal voltage.
Claim 4
Dependent Claim
30 words
A liquid crystal display according to claim 1 wherein a channel resistance of each of said thin film transistors in its OFF state is not smaller than 10 12 Ω.
Claim 5
Dependent Claim
20 words
A liquid crystal display according to claim 3, wherein each of said thin film transistors is an amorphous semiconductor transistor.
Claim 6
Dependent Claim
26 words
The liquid crystal display as set forth in claim 1, wherein the plurality of gate lines crossing said data lines do so in a perpendicular arrangement.
Claim 7
Dependent Claim
213 words
A liquid crystal display comprising: a first substrate including thereon a plurality of data lines, a plurality of gate lines perpendicular to said data lines, a plurality of pixel electrodes disposed at respective crossing portion of said data lines and said gate lines, a plurality of insulated gate thin film transistors disposed at said crossing portions, and a second substrate facing said first substrate each of said thin film transistors having two electrodes connected respectively to an associated one of the pixel electrodes and an associated one of the data lines, the transistors further having a gate connected to an associated one of the gate lines passing said associated crossing portion so that conduction of the transistor is controlled by a gate voltage applied through the gate line to said gate, wherein each of the transistors has a channel resistance not smaller than 10 12 Ω between the two electrodes, when the transistor is turned off, whereby a layer of liquid crystal sandwiched between said first and second substrate so as to provide pixels at the crossing portions in cooperation with said pixel electrodes, is controlled by the associated pixel electrode to which a data voltage is applied through the associated transistor, when it is turned on, from the data line connected thereto.
Claim 8
Dependent Claim
213 words
A liquid crystal display comprising: a first substrate including thereon a plurality of data lines, a plurality of gate lines perpendicular to said data lines, a plurality of pixel electrodes disposed at respective crossing portion of said data lines and said gate lines, a plurality of insulated gate thin film transistors disposed at said crossing portions, and a second substrate facing said first substrate each of said thin film transistors having two electrodes connected respectively to an associated one of the pixel electrodes and an associated one of the data lines, the transistors further having a gate connected to an associated one of the gate lines passing said associated crossing portion so that conduction of the transistor is controlled by a gate voltage applied through the gate line to said gate, wherein each of the transistors has a channel resistance not smaller than 10 12 Ω between the two electrodes, when the transistor is turned off, whereby a layer of liquid crystal sandwiched between said first and second substrate so as to provide pixels at the crossing portions in cooperation with said pixel electrodes, is controlled by the associated pixel electrode to which a data voltage is applied through the associated transistor, when it is turned on, from the data line connected thereto.
Claim 9
Dependent Claim
20 words
A liquid crystal display according to claim 6 wherein, each of said thin film transistors is an amorphous semiconductor transistor.
Claim 10
Independent Claim
277 words
A method of driving a liquid crystal display wherein the display comprises a first substrate including thereon a plurality of data lines, a plurality of gate lines crossing said data lines, a plurality of pixel electrodes disposed at respective crossing portions of said data lines and said gate lines, and a plurality of insulated gate thin film transistors disposed at said crossing portions, each of said thin film transistors being connected between an associated one of the pixel electrodes and an associated one of the data lines, the each transistor further having a gate connected to an associated one of the gate lines passing said associated crossing portion, wherein the each of said transistors is turned on when a gate voltage higher than a predetermined threshold value is applied to its gate; a second substrate facing to said first substrate and including a transparent conductor formed on its surface; a layer of liquid crystal sandwiched between said first and second substrates so as to provide a plurality of pixels at the respective crossing portions in cooperation with said pixel electrodes; means for selectively applying a data voltage to each of said data lines, and means for selectively applying a gate voltage to each of said gate lines, said method comprising the steps of: applying a data voltage having a value between a predetermined maximum and minimum value to the associated one of said data lines; and, applying a gate voltage having a value higher than a sum of the maximum value of the data voltage and the predetermined threshold value for the gate voltage to the associated one of said gate lines for turning on the transistor.
Claim 11
Independent Claim
277 words
A method of driving a liquid crystal display wherein the display comprises a first substrate including thereon a plurality of data lines, a plurality of gate lines crossing said data lines, a plurality of pixel electrodes disposed at respective crossing portions of said data lines and said gate lines, and a plurality of insulated gate thin film transistors disposed at said crossing portions, each of said thin film transistors being connected between an associated one of the pixel electrodes and an associated one of the data lines, the each transistor further having a gate connected to an associated one of the gate lines passing said associated crossing portion, wherein the each of said transistors is turned on when a gate voltage higher than a predetermined threshold value is applied to its gate; a second substrate facing to said first substrate and including a transparent conductor formed on its surface; a layer of liquid crystal sandwiched between said first and second substrates so as to provide a plurality of pixels at the respective crossing portions in cooperation with said pixel electrodes; means for selectively applying a data voltage to each of said data lines, and means for selectively applying a gate voltage to each of said gate lines, said method comprising the steps of: applying a data voltage having a value between a predetermined maximum and minimum value to the associated one of said data lines; and, applying a gate voltage having a value higher than a sum of the maximum value of the data voltage and the predetermined threshold value for the gate voltage to the associated one of said gate lines for turning on the transistor.
Claim 12
Dependent Claim
88 words
A method according to claim 8, further comprising the step of, when a one of the plurality of transistors is to be turned off, applying to the gate of the one transistor through the gate line connected thereto a gate voltage having a value smaller than the subtraction of the value of a voltage drop at the pixel electrode connected to the transistor upon transition from an ON state of said thin film transistor to an OFF state thereof from the minimum value of said data signal voltage.
Claim 13
Dependent Claim
30 words
The method of driving a liquid crystal display as set forth in claim 8, wherein the plurality of gate lines crossing said data lines do so in a perpendicular arrangement.
Claim 14
Independent Claim
202 words
A method of driving an active matrix liquid crystal display including a thin film transistor switching element disposed at a pixel electrode of the display, the electrode being generally disposed at each of a plurality of crossing portions of data lines and gate lines of the display, the method comprising the steps of: applying to each of the data lines a data voltage (V D ) predetermined to be within a voltage range between a maximum (V Dmax ) and minimum (V Dmin ) for driving the pixel electrode, said voltage being determinative of selected pixel gray scale intensity; scanning the gate lines during a selection period with a select gate voltage (V s ) having a value greater than a sum of a transistor gate threshold voltage (V T ) and the maximum data voltage (V Dmax ), and during a non-selected period with a non-select gate voltage (V NS ) having a value less than the minimum data voltage (V Dmin ) minus a voltage drop (ΔV) at the pixel electrode upon transistor transition from an ON state to an OFF state, whereby improved pixel picture quality results by maintaining the pixel electrode at the data voltage during non-selection periods.
Claim 15
Independent Claim
202 words
A method of driving an active matrix liquid crystal display including a thin film transistor switching element disposed at a pixel electrode of the display, the electrode being generally disposed at each of a plurality of crossing portions of data lines and gate lines of the display, the method comprising the steps of: applying to each of the data lines a data voltage (V D ) predetermined to be within a voltage range between a maximum (V Dmax ) and minimum (V Dmin ) for driving the pixel electrode, said voltage being determinative of selected pixel gray scale intensity; scanning the gate lines during a selection period with a select gate voltage (V s ) having a value greater than a sum of a transistor gate threshold voltage (V T ) and the maximum data voltage (V Dmax ), and during a non-selected period with a non-select gate voltage (V NS ) having a value less than the minimum data voltage (V Dmin ) minus a voltage drop (ΔV) at the pixel electrode upon transistor transition from an ON state to an OFF state, whereby improved pixel picture quality results by maintaining the pixel electrode at the data voltage during non-selection periods.
References Cited (Backward Citations)
US4062626A
Cited
US4385292A
Cited
US4386353A
Cited
JPS59119328A
Cited
US4818077A
Cited
US4743096A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-03-19 | 1993-09-18 | 1994-03-20 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-03-19 | 1997-09-18 | 1998-03-20 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-03-19 | 2001-09-18 | 2002-03-20 | $7700.00 | Window Closed / Lapsed |