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US4906860A Expired / Lapsed US ⏱️ 0.0 years remaining

Control device for active filter

Assignee: Mitsubishi Electric Corp
•
Filing: 1989-05-05
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Granted: 1990-03-06
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Expires: 2009-05-05
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Abstract

Abstract A control device for an active filter according to the present invention comprises a ROM circuit for producing output signals sin θ and cos θ from a phase signal generated from a PLL circuit, a first multiplier for multiplying a load current detection signal by the output signals sin θ and cos θ, a sample-holding circuit for integrating the output signal of the first multiplier and holding the integrated value to produce peak values of valid current component and invalid current component for constituting the basic wave component of the load current, a second multiplier for multiplying the peak values by the output signals sin θ and cos θ, and a PWM control circuit for PWM-controlling the input current of the active filter with a harmonic current signal obtained as the difference between a basic wave current signal of the load current during a period of next one period of the single-phase a.c. power source and the load current detection signal by utlizing as the basic wave current signal of the load current of the period of next one period of the single-phase a.c. power source the basic wave current signal obtained by combining the valid current component and the invalid current component of the basic wave component outputted from the second multiplier.

Inventors

  • 👤 Takeaki Asaeda

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 20:36
CPC Classifications
H; H02; H02J; H02J3/00; H02J3/01; G; G05; G05F; G05F1/00; G05F1/70; Y; Y02; Y02E; Y02E40/00; Y02E40/40

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 261 words
A control device for an active filter connected in parallel with a load connected to a single-phase a.c. power source for operating to absorb a harmonic current component of said load comprising: a PLL circuit for generating a phase signal synchronized with said single-phase a.c. power source; a ROM circuit inputting said phase signal for producing output signals sin θ and cos θ; a first multiplier for multiplying a load current detection signal of said load by the output signals sin θ and cos θ; an integrator for integrating the output signal of said first multiplier at each one period of said single-phase a.c. power source; a sample-holding circuit for holding the integrated final value of said integrator to produce peak values of valid current component and invalid current component for constituting the basic wave component of the load current, a second multiplier for multiplying the peak values by the output signals sin θ and cos θ, and a PWM control circuit for PWM-controlling the input current of said active filter with a harmonic current signal obtained as the difference between a basic wave current signal of the load current during a period of next one period of said single-phase a.c. power source and the load current detection signal by utilizing as the basic wave current signal of the load current of the period of next one period of said single-phase a.c. power source the basic wave current signal obtained by combining the valid current component and the invalid current component of the basic wave component outputted from said second multiplier.
Claim 2
Dependent Claim 261 words
A control device for an active filter connected in parallel with a load connected to a single-phase a.c. power source for operating to absorb a harmonic current component of said load comprising: a PLL circuit for generating a phase signal synchronized with said single-phase a.c. power source; a ROM circuit inputting said phase signal for producing output signals sin θ and cos θ; a first multiplier for multiplying a load current detection signal of said load by the output signals sin θ and cos θ; an integrator for integrating the output signal of said first multiplier at each one period of said single-phase a.c. power source; a sample-holding circuit for holding the integrated final value of said integrator to produce peak values of valid current component and invalid current component for constituting the basic wave component of the load current, a second multiplier for multiplying the peak values by the output signals sin θ and cos θ, and a PWM control circuit for PWM-controlling the input current of said active filter with a harmonic current signal obtained as the difference between a basic wave current signal of the load current during a period of next one period of said single-phase a.c. power source and the load current detection signal by utilizing as the basic wave current signal of the load current of the period of next one period of said single-phase a.c. power source the basic wave current signal obtained by combining the valid current component and the invalid current component of the basic wave component outputted from said second multiplier.
Claim 3
Dependent Claim 73 words
The control device for an active filter according to claim 1, wherein, when said active filter is constituted of a voltage type inverter, its output voltage is compared with the reference signal of said output voltage, while when said active filter is constituted of a current type inverter, its output current is compared with a reference signal of said output current, and the difference is amplified, and added to the valid current component.
Claim 4
Dependent Claim 78 words
The control device for an active filter according to claim 1, wherein a plurality of sets of integrators and sample-holding circuits are constituted in a time division multiplexer, and operated in a time division manner, the output signals of said sets of sample-holding circuits are selected synchronously with the time division timing signal to obtain the peak values of the valid current component and the invalid current component for constituting the basic wave component of the load current.

References Cited (Backward Citations)

US3531652A Cited
US3628057A Cited
US4053820A Cited
US4647837A Cited
US4812669A Cited
US4757415A Cited
US4835411A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1993-03-05 1993-09-04 1994-03-06 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1997-03-05 1997-09-04 1998-03-06 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2001-03-05 2001-09-04 2002-03-06 $7700.00 Window Closed / Lapsed

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