Image processing apparatus

Claim 1

An image processing apparatus comprising: image data input means; and processing means for processing image data input by said image data input means, said processing means including image content discrimination means for discriminating a content of the input image data and binarization means for binarizing the input image data; wherein said discriminating means divides the input image data into a plurality of blocks and discriminates the image content for each of said blocks, each of said blocks comprising a plurality of image data; wherein said binarization means includes: first, second and third binarizing circuits for binarizing the input image data using first, second and third threshold matricies different from each other to output respectively first, second and third binary data, and first, second and third memory means for storing the first, second and third binary data output from said first, second and third binarization means, respectfully; wherein said first, second and third memory means are capable of storing said first, second and third binary data of plural lines associated with said block, respectively, to delay said first, second and third binary data, respectively, in response to a discrimination operation performed by said discrimination means; and wherein said processing means includes means for selecting one of said first, second and third binary data output from said first, second and third memory means in accordance with a result of the discrimination operation performed by said discrimination means.