Power on reset circuit for a MOS technology integrated circuit

Claim 2

A power on reset circuit for starting a MOS technology integrated circuit, comprising voltage-increasing means supplied by a supply voltage, for building a voltage higher than said supply voltage, and comparing means for comparing said higher voltage and said supply voltage and for delivering a powering signal when the difference between said voltages exceeds a given threshold.

Claim 3

A circuit according to claim 1 further comprising an oscillator connected to said voltage-increasing means.

Claim 4

A circuit according to claim 1 wherein said second means consist of a comparator circuit receiving said generated voltage and said supply voltage, respectively, at each input terminal, and delivering an output signal which is a function of the difference between said two voltages, said second means further consisting of a detection and shaping circuit connected to the output terminal of said comparator circuit and generating the powering signal.

Claim 5

A circuit according to claim 3 wherein the comparator circuit consists of two N-type MOS transistors, which are series-connected between a current generator and a low voltage or ground.

Claim 6

A circuit according to claim 3 wherein the detection and shaping circuit consists of a first inverter gate with a defined threshold voltage, and of an inverter the input terminal of which is connected to the output terminal of said first inverter gate.

Claim 7

A circuit according to claim 3 wherein said means to stop the operation of the circuit, once the powering signal has been generated, consist of NOR gates connected, respectively, in the loop of said oscillator and in the detection and shaping circuit, said NOR gates receiving the powering signal at one of their input terminals, said stopping means further consisting of a current generator.

Claim 8

A circuit according to claim 4 wherein said current generator consists of a P-type MOS transistor having one of its electrodes connected to the supply voltage source and its gate connected to the powering signal.

Claim 9

A circuit according to claim 1 further comprising means to stop the operation of the circuit once the powering signal has been generated.

Claim 10

A circuit according to claim 2 wherein the oscillator consists of an odd number of series-connected inverters, the output of the last inverter being looped back to the input terminal of the first inverter.

Claim 11

A circuit according to claim 2 wherein the voltage-increasing device comprises a first diode which is direct-bias connected between the supply terminal and a first circuit node, a first capacitor which is connected between said first circuit node and the output terminal of a first inverter, a second diode which is direct-bias connected between said first circuit node and a second circuit node, and a second capacitor which is connected between said second circuit node and the output terminal of a second inverter which is series-connected with said first inverter, the output terminal of the voltage-increasing device being said second circuit node.

Claim 12

A circuit according to claim 9 wherein the voltage-increasing device comprises a first diode which is direct-bias connected between the supply terminal and a first circuit node, a first capacitor which is connected between said first circuit node and the output terminal of a first inverter, a second diode which is direct-bias connected between said first circuit node and a second circuit node, and a second capacitor which is connected between said second circuit node and the output terminal of a second inverter which is series-connected with said first inverter, the output terminal of the voltage-increasing device being said second circuit node.

Claim 13

A circuit according to claim 11 wherein the voltage-increasing device further comprises at least one additional stage.

Claim 14

A circuit according to claim 12 wherein the additional stage consists of a diode which is direct-bias connected between a penultimate circuit node and a second circuit node forming the output terminal of said voltage-increasing device, and a capacitor, which is connected between the last node and the output terminal of an additional inverter, which is series-connected with the other inverters.

Claim 15

A circuit according to claim 11 wherein the voltage-increasing device further comprises a filtering stage consisting of a diode, which is direct-bias connected between said last node forming the output of the voltage-increasing device and a new output terminal node, and a capacitor which is connected between said new output circuit node and a low voltage or ground.

Claim 16

A circuit according to claim 11 wherein, in C-MOS technology, the diodes are made with a P-type MOS transistor, all three electrodes of which are connected together and form the cathode, and the wall N of which forms the anode.

Claim 17

A circuit according to claim 13 wherein, in C-MOS technology, the diodes are made with a P-type MOS transistor, all three electrodes of which are connected together and form the cathode, and the well N of which forms the anode.

Claim 18

A circuit according to claim 10 wherein the voltage-increasing device further comprises at least one additional stage.

Claim 19

A circuit according to claim 17 wherein the additional stage consists of a diode which is direct-bias connected between a penultimate circuit node and a second circuit node forming the output terminal of said voltage-increasing device, and a capacitor, which is connected between the last node and the output terminal of an additional inverter, which is series-connected with the other inverters.

Claim 20

A circuit according to claim 10 wherein the voltage-increasing device further comprises a filtering stage consisting of a diode, which is direct-bias connected between said last node forming the output of the voltage-increasing device and a new output terminal node, and a capacitor which is connected between said new output circuit node and a low voltage or ground.

Claim 21

A circuit according to claim 10 wherein, in C-MOS technology, the diodes are made with a P-type MOS transistor, all three electrodes of which are connected together and form the cathode, and the well N of which forms the anode.