Comparison circuit with error compensated mos switches

Claim 2

In an MOS device, a comparison circuit for comparing two input voltages, comprising: a differential amplifier including a first input supplied through a first capacitor and a switch arrangement during a first time period with a first input voltage (Ue) and during a second time period, succeeding the first time period, with a second input voltage (Ud) by means of the first capacitor and the switch arrangement, means connecting a second input of the differential amplifier via a second capacitor and a change-over device to a reference voltage source whereby the change-over device alternately connects the second capacitor to the reference voltage source during said first and second time periods, and second means connecting an output of the differential amplifier during the first time period to the first and the second input thereof.

Claim 3

A comparison circuit as claimed in claim 1, wherein said switch arrangement comprises a first switch which is closed during the first time period so as to apply the first input voltage to a first terminal of the first capacitor and a second switch closed during the second time period for applying the second input voltage to the first terminal of the first capacitor, the first input of the differential amplifier being coupled to a second terminal of the first capacitor, wherein said second connecting means includes a third switch closed during the first time period for coupling the first input of the differential amplifier to its output, wherein said change-over device includes fourth and fifth switches which couple the second input of the differential amplifier via the second capacitor to the reference voltage source, and wherein said second connecting means includes a sixth switch for coupling the output of the differential amplifier to the second input thereof, the fourth and sixth switches being closed during the first time period and the fifth switch being closed during the second time period.

Claim 4

A comparison circuit as claimed in claim 2, characterized in that the switches each comprise the parallel arrangement of a drain/source path of an N-channel MOS field effect transistor and of a drain/source path of a P-channel MOS field effect transistor, and wherein a gate connection of the N-channel transistor receives a switching signal and a gate connection of the P-channel transistor receives an inverted switching signal.

Claim 5

A comparison circuit comprising: a differential amplifier having first and second inputs and an output, first and second input terminals for supplying first and second analog input voltages, first means connecting said first input terminal to said first input of the amplifier via a first MOS switch and a first capacitor, second means connecting said second input terminal to said first input of the amplifier via a second MOS switch and said first capacitor, a second capacitor and a change-over device including third and fourth MOS switches for coupling said second input of the differential amplifier to a source of reference voltage, fifth and sixth switches for coupling said output of the differential amplifier to said first and second inputs thereof, respectively, and means for operating said switches so that during a first time period the first, third, fifth and sixth switches are closed and the second and fourth switches are open and, during a second time period, the second and fourth switches are closed and the first, third, fifth and sixth switches are open.

Claim 6

A comparison circuit comprising: a differential amplifier having first and second inputs and an output, first and second input terminals for supplying first and second analog input voltages, first means connecting said first input terminal to said first input of the amplifier via a first MOS switch and a first capacitor, second means connecting said second input terminal to said first input of the amplifier via a second MOS switch and said first capacitor, a second capacitor and a change-over device including third and fourth MOS switches for coupling said second input of the differential amplifier to a source of reference voltage, fifth and sixth switches for coupling said output of the differential amplifier to said first and second inputs thereof, respectively, and means for operating said switches so that during a first time period the first, third, fifth and sixth switches are closed and the second and fourth switches are open and, during a second time period, the second and fourth switches are closed and the first, third, fifth and sixth switches are open.

Claim 7

A comparison circuit as claimed in claim 4, wherein each of said switches comprise a pair of parallel connected MOSFET elements having gate electrodes coupled to said operating means.

Claim 8

A successive approximation A/D inverter comprising: an input terminal for an analog input signal to be converted into a digital signal, a comparison circuit including a differential amplifier having first and second inputs and an output coupled to said second input of the amplifier via a control circuit and a D/A converter, wherein said comparison circuit further comprises: a first MOS switch and a first capacitor coupled in series circuit between said input terminal and said first input of the differential amplifier, a second MOS switch connected in a second series circuit with the first capacitor between an output of the D/A converter and the first input of the differential amplifier, a second capacitor and change-over device for coupling said second input of the differential amplifier to a source of reference voltage, switching means for coupling said output of the differential amplifier to said first and second inputs thereof, and means for operating said first and second MOS switches, said change-over device and said switching means so that, during a first time period, said input signal is applied to the first input of the differential amplifier via the first series circuit, said switching means couples the amplifier output to said first and second inputs thereof, and said change-over device couples said second input of the differential amplifier to said reference voltage source via the second capacitor, and, during a second time period, said input signal is decoupled from the first input of the differential amplifier via the first MOS switch, said amplifier output is decoupled from said first and second inputs thereof via said switching means, and said first and second amplifier inputs are coupled via said second series circuit and said change-over device, respectively, to said output of the D/A converter and to said source of reference voltage, respectively.

Claim 9

A successive approximation A/D inverter comprising: an input terminal for an analog input signal to be converted into a digital signal, a comparison circuit including a differential amplifier having first and second inputs and an output coupled to said second input of the amplifier via a control circuit and a D/A converter, wherein said comparison circuit further comprises: a first MOS switch and a first capacitor coupled in series circuit between said input terminal and said first input of the differential amplifier, a second MOS switch connected in a second series circuit with the first capacitor between an output of the D/A converter and the first input of the differential amplifier, a second capacitor and change-over device for coupling said second input of the differential amplifier to a source of reference voltage, switching means for coupling said output of the differential amplifier to said first and second inputs thereof, and means for operating said first and second MOS switches, said change-over device and said switching means so that, during a first time period, said input signal is applied to the first input of the differential amplifier via the first series circuit, said switching means couples the amplifier output to said first and second inputs thereof, and said change-over device couples said second input of the differential amplifier to said reference voltage source via the second capacitor, and, during a second time period, said input signal is decoupled from the first input of the differential amplifier via the first MOS switch, said amplifier output is decoupled from said first and second inputs thereof via said switching means, and said first and second amplifier inputs are coupled via said second series circuit and said change-over device, respectively, to said output of the D/A converter and to said source of reference voltage, respectively.