Patent US2105320A successfully refreshed from Google Patents.
US4897871A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Apparatus for transmitting and/or receiving balanced signals on a two-wire telecommunication line
Assignee: Siemens Corp
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Filing: 1987-03-26
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Granted: 1990-01-30
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Expires: 2007-03-26
Abstract
Abstract A transformerless hybrid circuit arrangement for a subscriber line interface circuit of a telecommunications exchange is disclosed. A preferred embodiment of the hybrid arrangement comprises a first and a second operational amplifier plus a differential amplifier connected together in the following manner: The non-inverting input of the first operational amplifier is connected to a first reference voltage and the output of this amplifier is connected (1) via a first resistor to one wire of the two-wire subscriber line, and (2) via a third resistor to the inverting input of the amplifier. The non-inverting input of the second operational amplifier is connected to a second reference voltage and to the receiving branch of the four-wire line of the telecommunications exchange. The output of this second operational amplifier is connected via a second resistor to the other wire of the two-wire subscriber line, via a fourth resistor to the inverting input thereof and via a fifth resistor to the inverting input of the first operational amplifier. Each of the two inputs of the differential amplifier are connected, via respective resistors, to one wire of the two-wire subscriber line and to the output of that operational amplifier which is connected to the other wire of the two-wire subscriber line. The output of the differential amplifier is connected to the transmitting branch of the four-wire line of the exchange.
Inventors
- 👤 Morris L. Minch
- 👤 Theodore W. Wagner
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 02:04
CPC Classifications
H; H04; H04B; H04B1/00; H04B1/38; H04B1/40; H04B1/54; H04B1/58; H04B1/586; H04B1/583
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
207 words
A telecommunication DC line current asymmetry detection circuit comprising: a summing stage having first, second, third, and fourth inputs and an output, said summing stage being connected to the telecommunication line for providing at said output an output voltage proportional to VT+VR-VA-VB where VR is the voltage on a first wire of the telecommunication line; VT is the voltage on a second wire of the telecommunication line, said first and second inputs being connected to said first and second wires, respectively; VA is a voltage at a first terminal of a first resistor connected to said first wire, said first terminal being further connected to a first reference voltage; VB is a voltage at a second terminal of a second resistor connected to said second wire, said second terminal being further connected to a second reference voltage, said third and fourth inputs being connected to said first and second terminals, respectively; a low pass filter coupled to said output of said summing stage for filtering the effects of voltage transients; and a threshold circuit comprising a comparator for comparing the output of said low pass filter with a pre-established threshold value and providing an output indicating an asymmetric DC line current condition when said threshold is exceeded.
Claim 2
Dependent Claim
207 words
A telecommunication DC line current asymmetry detection circuit comprising: a summing stage having first, second, third, and fourth inputs and an output, said summing stage being connected to the telecommunication line for providing at said output an output voltage proportional to VT+VR-VA-VB where VR is the voltage on a first wire of the telecommunication line; VT is the voltage on a second wire of the telecommunication line, said first and second inputs being connected to said first and second wires, respectively; VA is a voltage at a first terminal of a first resistor connected to said first wire, said first terminal being further connected to a first reference voltage; VB is a voltage at a second terminal of a second resistor connected to said second wire, said second terminal being further connected to a second reference voltage, said third and fourth inputs being connected to said first and second terminals, respectively; a low pass filter coupled to said output of said summing stage for filtering the effects of voltage transients; and a threshold circuit comprising a comparator for comparing the output of said low pass filter with a pre-established threshold value and providing an output indicating an asymmetric DC line current condition when said threshold is exceeded.
Claim 3
Dependent Claim
36 words
The telecommunication DC line current asymmetry detection circuit of claim 1 further comprising: an electronic switch connected to the output of said threshold circuit for providing a control signal indicating said asymmetric DC line current condition.
Claim 4
Dependent Claim
252 words
A telecommunication DC line current asymmetry detection circuit comprising: a summing stage having first, second, third, and fourth inputs and an output, said summing stage being connected to the telecommunication line for providing at said output an output voltage proportional to VT+VR-VA-VB where VR is the voltage on a first wire of the telecommunication line; VT is the voltage on a second wire of the telecommunication line, said first and second inputs being connected to said first and second wires, respectively; VA is a voltage at a first terminal of a first resistor connected to said first wire, said first terminal being further connected to a first reference voltage; VB is a voltage at a second terminal of a second resistor connected to said second wire, said second terminal being further connected to a second reference voltage, said third and fourth inputs being connected to said first and second terminals, respectively; a low pass filter responsive to said output voltage for providing a control signal output; an automatic gain control circuit controlled by said control signal output of said low pass filter, said automatic gain control circuit providing an AC signal output; a threshold circuit comprising a comparator for comparing the output of said low pass filter with a pre-established threshold value and providing an output indicating an asymmetric DC line current condition when said threshold is exceeded; and an electronic switch coupled to said output of said threshold circuit for providing a control signal indicating said asymmetric DC line current condition.
Claim 5
Dependent Claim
252 words
A telecommunication DC line current asymmetry detection circuit comprising: a summing stage having first, second, third, and fourth inputs and an output, said summing stage being connected to the telecommunication line for providing at said output an output voltage proportional to VT+VR-VA-VB where VR is the voltage on a first wire of the telecommunication line; VT is the voltage on a second wire of the telecommunication line, said first and second inputs being connected to said first and second wires, respectively; VA is a voltage at a first terminal of a first resistor connected to said first wire, said first terminal being further connected to a first reference voltage; VB is a voltage at a second terminal of a second resistor connected to said second wire, said second terminal being further connected to a second reference voltage, said third and fourth inputs being connected to said first and second terminals, respectively; a low pass filter responsive to said output voltage for providing a control signal output; an automatic gain control circuit controlled by said control signal output of said low pass filter, said automatic gain control circuit providing an AC signal output; a threshold circuit comprising a comparator for comparing the output of said low pass filter with a pre-established threshold value and providing an output indicating an asymmetric DC line current condition when said threshold is exceeded; and an electronic switch coupled to said output of said threshold circuit for providing a control signal indicating said asymmetric DC line current condition.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-01-29 | 1993-07-31 | 1994-01-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-01-29 | 1997-07-31 | 1998-01-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-01-29 | 2001-07-31 | 2002-01-30 | $7700.00 | Window Closed / Lapsed |