US4897601A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Test fixture for integrated circuit chips
Assignee: BAE Systems Space & Mission Systems Inc
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Filing: 1988-03-02
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Granted: 1990-01-30
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Expires: 2008-03-02
Abstract
Abstract Apparatus and method are provided for making rf contact between the ground plane surface of a microwave-monolithic-integrated-circuit chip and a test fixture. The test fixture includes a chip support with a planar surface, a chip stop with a wedging surface, a clamp-release lever with a wedging surface, and a spring. The conductive ground plane surface of a MMIC chip is pressed against a planar surface with a contacting force that is a function of a clamping force that is applied to one of the wedging surfaces, and that is a function of angles of the wedging surfaces. Heat applied to the MMIC chip cooperates with the contacting force to provide a suitable rf connection between the ground plane surface of the chip and the planar surface of the test fixture.
Inventors
- 👤 Vincent A. Hirsch
- 👤 Edward D. Freymiller
- 👤 Edward C. Johnson
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 22:35
CPC Classifications
G; G01; G01R; G01R1/00; G01R1/02; G01R1/04; G01R1/0408; G01R1/0433; G01R1/0441; G01R1/045
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
132 words
A test fixture for non-destructive testing of integrated circuit chips of the type having spaced-apart edges and a ground plane surface that is disposed between said spaced-apart edges, which test fixture comprises: a base; a chip support being operatively secured to said base, and having a generally planar surface; clamping means, comprising first and second chip stops that are operatively attached to said base, for placing a predetermined resilient force on said spaced-apart edges; contacting means, comprising first and second wedging surfaces on respective ones of said chip stops, for pressing said ground plane surface against said planar surface with a contacting force that is a predetermined ratio of said predetermined resilient force; and releasing means for selectively moving one of said chip stops away from the other of said chip stops.
Claim 2
Dependent Claim
132 words
A test fixture for non-destructive testing of integrated circuit chips of the type having spaced-apart edges and a ground plane surface that is disposed between said spaced-apart edges, which test fixture comprises: a base; a chip support being operatively secured to said base, and having a generally planar surface; clamping means, comprising first and second chip stops that are operatively attached to said base, for placing a predetermined resilient force on said spaced-apart edges; contacting means, comprising first and second wedging surfaces on respective ones of said chip stops, for pressing said ground plane surface against said planar surface with a contacting force that is a predetermined ratio of said predetermined resilient force; and releasing means for selectively moving one of said chip stops away from the other of said chip stops.
Claim 3
Dependent Claim
33 words
A test fixture as claimed in claim 1 in which said means for moving said one chip stop away from said other chip stop comprises means for arcuately moving said one chip stop.
Claim 4
Dependent Claim
73 words
A test fixture as claimed in claim 2 in which said test fixture includes a clamp-release lever that is pivotally attached to said base; said clamp-release lever includes said one chip stop; said arcuate movement of said one chip stop, comprise a pivotal attachment of said clamp-release lever to said base; and said means for placing said predetermined resilient force on said spaced-apart edges comprises a spring that operatively engages said clamp-release lever.
Claim 5
Independent Claim
112 words
A method for non-destructive testing of integrated circuit chips of the type having spaced-apart edges, and having a conductive ground plane surface that is disposed between said spaced-apart edges, which method comprises: (a) providing a chip support with a generally planar surface; (b) locating a chip with one of the edges thereof against a first chip stop; (c) resiliently urging a second chip stop against the other of said edges of said chip with a predetermined clamping force; (d) pressing said conductive ground plane surface against said planar surface with a predetermined contacting force that is a predetermined ratio of said clamping force; and (e) making bonded electrical connections with said chip.
Claim 6
Independent Claim
112 words
A method for non-destructive testing of integrated circuit chips of the type having spaced-apart edges, and having a conductive ground plane surface that is disposed between said spaced-apart edges, which method comprises: (a) providing a chip support with a generally planar surface; (b) locating a chip with one of the edges thereof against a first chip stop; (c) resiliently urging a second chip stop against the other of said edges of said chip with a predetermined clamping force; (d) pressing said conductive ground plane surface against said planar surface with a predetermined contacting force that is a predetermined ratio of said clamping force; and (e) making bonded electrical connections with said chip.
Claim 7
Dependent Claim
27 words
A method as claimed in claim 4 in which said pressing step, and said contacting force thereof, comprises utilizing a predetermined proportion of said predetermined clamping force.
Claim 8
Independent Claim
128 words
A method for non-destructive testing of integrated circuit chips of the type having spaced-apart edges, and having a conductive ground plane surface that is disposed between said spaced-apart edges, which method comprises: (a) providing a chip support with a generally planar surface; (b) locating a chip with one of the edges thereof against a first wedging surface of a first chip stop; (c) clamping said second wedging surface of a second chip stop against the other of said edges of said chip; (d) pressing said conductive ground plane surface against said planar surface with a predetermined contacting force; (e) making bonded electrical connections with said chip; and (f) said clamping step comprises moving said second wedging surface arcuately toward said first wedging surface and toward said planar surface.
Claim 9
Independent Claim
128 words
A method for non-destructive testing of integrated circuit chips of the type having spaced-apart edges, and having a conductive ground plane surface that is disposed between said spaced-apart edges, which method comprises: (a) providing a chip support with a generally planar surface; (b) locating a chip with one of the edges thereof against a first wedging surface of a first chip stop; (c) clamping said second wedging surface of a second chip stop against the other of said edges of said chip; (d) pressing said conductive ground plane surface against said planar surface with a predetermined contacting force; (e) making bonded electrical connections with said chip; and (f) said clamping step comprises moving said second wedging surface arcuately toward said first wedging surface and toward said planar surface.
Claim 10
Dependent Claim
23 words
A method as claimed in claim 6 in which said arcuate moving step comprises pivoting said second chip stop around a pivot axis.
Claim 11
Dependent Claim
37 words
A method as claimed in claim 7 in which said pressing with a predetermined contacting force comprises utilizing a spring to resiliently urge said second wedging surface arcuately toward said first wedging surface and said planar surface.
Claim 12
Dependent Claim
31 words
A method as claimed in claim 8 in which said method comprises selectively moving said second wedging surface arcuately away from said first wedging surface and away from said planar surface.
References Cited (Backward Citations)
US3651434A
Cited
US3775644A
Cited
US4365195A
Cited
US4574235A
Cited
US4480240A
Cited
US4567432A
Cited
US4630875A
Cited
US4689556A
Cited
US4747784A
Cited
US4758176A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-01-29 | 1993-07-31 | 1994-01-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-01-29 | 1997-07-31 | 1998-01-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-01-29 | 2001-07-31 | 2002-01-30 | $7700.00 | Window Closed / Lapsed |