US4894690A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Thin film transistor array incorporating a shorted circuit bypass technique
Assignee: Frontec Inc
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Filing: 1988-03-25
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Granted: 1990-01-16
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Expires: 2008-03-25
Abstract
Abstract A thin film transistor array includes a gate bus and a source bus intersecting with each other at right angles, a thin film transistor pair disposed adjacent to the intersecting point and electrically connected to the two buses. If a short circuit is detected between the two buses, the gate bus or the source bus is severed into a separate portions to eliminate the short circuit. A bypass bus is provided to electrically connect the electrically good severed portions and to the end terminal. Such a bypass bus avoids the need for additional power supply terminals to the opposite ends of the severed bus and facilitates driving the thin film transistor by supplying the power at only one end thereof.
Inventors
- 👤 Kazuya Okabe
- 👤 Hideyuki Matsuda
- 👤 Yasuhiko Kasama
- 👤 Hiroyuki Hebiguchi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 22:06
CPC Classifications
H; H10; H10D; H10D86/00; G; G02; G02F; G02F1/00; G02F1/01; G02F1/13; G02F1/133; G02F1/136; G02F1/1362; G02F1/1368; G02F1/136259; G02F1/136263; G02F1/136268; G02F1/136286; G02F1/13629
Claims Analysis
Total Claims: 3
Claim 1
Independent Claim
188 words
A thin film transistor array comprising: a substrate; a first plurality of buses disposed on the substrate; a second plurality of buses disposed on the substrate and intersecting said first plurality of buses at cross over points; a plurality of thin film transistors grouped in pairs, each transistor of the pair being parallel to point and connected to a bus of said first plurality thereof and a bus of said second plurality thereof for driving a liquid crystal display; a bypass bus disposed along a bus of said first and second pluralities thereof; a passivation layer disposed between said bypass bus and said bus of said first and second pluralities thereof, the bypass bus contacting said bus of said first and second pluralities thereof through contact holes, wherein said contact holes are defined through said passivation layer at predetermined locations, whereby in the event of an electrical short developing in the contacted bus between said contact holes, a portion of said contacted bus between said contact holes may be severed, with the bypass bus providing connection to the remaining portions of said contacted bus through said contact holes.
Claim 2
Dependent Claim
188 words
A thin film transistor array comprising: a substrate; a first plurality of buses disposed on the substrate; a second plurality of buses disposed on the substrate and intersecting said first plurality of buses at cross over points; a plurality of thin film transistors grouped in pairs, each transistor of the pair being parallel to point and connected to a bus of said first plurality thereof and a bus of said second plurality thereof for driving a liquid crystal display; a bypass bus disposed along a bus of said first and second pluralities thereof; a passivation layer disposed between said bypass bus and said bus of said first and second pluralities thereof, the bypass bus contacting said bus of said first and second pluralities thereof through contact holes, wherein said contact holes are defined through said passivation layer at predetermined locations, whereby in the event of an electrical short developing in the contacted bus between said contact holes, a portion of said contacted bus between said contact holes may be severed, with the bypass bus providing connection to the remaining portions of said contacted bus through said contact holes.
Claim 3
Dependent Claim
26 words
A thin film transistor array according to claim 1, wherein said portion of said contacted bus between said contact holes is severable by a laser beam.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-01-15 | 1993-07-17 | 1994-01-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-01-15 | 1997-07-17 | 1998-01-16 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-01-15 | 2001-07-17 | 2002-01-16 | $7700.00 | Window Closed / Lapsed |