US4890251A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Arithmetic shifter with sign extend facility
Assignee: Mitsubishi Electric Corp
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Filing: 1988-02-24
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Granted: 1989-12-26
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Expires: 2008-02-24
Abstract
Abstract A shifter for shifting a first data word by a bit width which is specified by a second data word. The shifter provides a sign extension so that the shifter can be used for arithmetic shifts. The shifter includes a first inverter for inverting the bits of the first data word only when the most significant bit of the data word is a predetermined datum. The output from the inverter is shifted, using a shifter array, by a bit width specified by the second data word. The output from the shifter array is provided to a second inverter. The second inverter inverts the output from the shifter array only if the most significant bit of the first data word is a predetermined datum.
Inventors
- 👤 Yasuhiko Nitta
- 👤 Kazuo Nakamura
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 03:00
CPC Classifications
G; G06; G06F; G06F5/00; G06F5/01; G06F5/015; G06F7/00; G06F7/38; G06F7/48; G06F7/499; G06F7/49994
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
96 words
A shifter for shifting first data by a bit width specified by second data, said shifter comprising: first inverter means for inverting respective bits of said first data to provide third data only if the most significant bit of said first data is predetermined data; a shifter array for shifting said third data by a bit width specified by said second data to provide fourth data; and second inverter means for inverting respective bits of said fourth data only if said most significant bit of said first data is said predetermined data, to provide output data.
Claim 2
Dependent Claim
96 words
A shifter for shifting first data by a bit width specified by second data, said shifter comprising: first inverter means for inverting respective bits of said first data to provide third data only if the most significant bit of said first data is predetermined data; a shifter array for shifting said third data by a bit width specified by said second data to provide fourth data; and second inverter means for inverting respective bits of said fourth data only if said most significant bit of said first data is said predetermined data, to provide output data.
Claim 3
Dependent Claim
109 words
The shifter of claim 1, wherein said third data has at least a first, higher bit position and a second bit position, and said fourth data has at least a first bit position and a second lower bit position, and wherein said shifter array comprises data input means, shift data input means, data output means, and a plurality of switching element means, connected to said data input means, said shift data input means and said data output means, for sequentially moving data from the higher bit position of said third data to the lower bit position of said fourth data by a bit width specified by said second data.
Claim 4
Dependent Claim
41 words
The shifter of claim 1, wherein said first inverter means comprises a plurality of first exclusive OR logic gates each receiving each bit of said first data at one of its inputs and said most significant bit at the other input.
Claim 5
Dependent Claim
46 words
The shifter of claim 2 or 3, wherein said second inverter means comprises a plurality of second exclusive OR logic gates each receiving each bit of data output from said shifter array at one of its inputs and said most significant bit at the other input.
Claim 6
Dependent Claim
20 words
A shifter, as claimed in claim 2, further comprising at least a first resistor connected to said data output means.
Claim 7
Independent Claim
151 words
A method for shifting a first data word by a bit width specified by a second data word, comprising: providing first and second selective inverter means for selectively inverting a data word input to said inverter means; providing a shifter array for shifting data input to said shifter array by a bit width specified by said second data; inputting said first data word to said first inverter; inverting said first data word using said first inverter means only if the most significant bit of said first data word is a predetermined datum, to provide a third data word; shifting said third data word using said shifter array by a bit width specified by said second data to provide a fourth data word; and inverting said fourth data word using said second selective inverter means when said most significant bit of said first data is said predetermined datum, to provide output data.
Claim 8
Independent Claim
151 words
A method for shifting a first data word by a bit width specified by a second data word, comprising: providing first and second selective inverter means for selectively inverting a data word input to said inverter means; providing a shifter array for shifting data input to said shifter array by a bit width specified by said second data; inputting said first data word to said first inverter; inverting said first data word using said first inverter means only if the most significant bit of said first data word is a predetermined datum, to provide a third data word; shifting said third data word using said shifter array by a bit width specified by said second data to provide a fourth data word; and inverting said fourth data word using said second selective inverter means when said most significant bit of said first data is said predetermined datum, to provide output data.
References Cited (Backward Citations)
US4396994A
Cited
US4583197A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1992-12-25 | 1993-06-26 | 1993-12-26 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-12-25 | 1997-06-26 | 1997-12-26 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-12-25 | 2001-06-26 | 2001-12-26 | $7700.00 | Window Closed / Lapsed |