← Back to Patent Explorer
US4889829A Expired / Lapsed US ⏱️ 0.0 years remaining

Method for producing a semiconductor device having a silicon-on-insulator structure

Assignee: Fujitsu Ltd
•
Filing: 1989-01-17
•
Granted: 1989-12-26
•
Expires: 2009-01-17
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A method for producing a semiconductor device having a silicon-on-insulator structure, includes the steps of depositing a first insulation film on a silicon substrate by a chemical vapor deposition process, patterning said first insulation film so as to be left in a silicon-on-insulator (SOI) element region, a portion of said silicon substrate having no first insulation film thereon being served as a bulk element region, depositing a polysilicon layer on an entire surface of said silicon substrate, patterning said polysilicon layer so as to be left on said patterned first insulation film, a patterned polysilicon layer being served as an active region, and simultaneously forming second and third insulation films for use in element insulation in said silicon substrate and said patterned polysilicon layer, respectively, by a local-oxidation-of-silicon (LOCOS) process, so that said bulk element region in surrounded by said second insulation film, and said SOI element region is surrounded by said third insulation film.

Inventors

  • 👤 Shinichi Kawai

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 16:37
CPC Classifications
H; H10; H10D; H10D87/00; H10D84/00; H10D84/01; H10D84/02; H10D84/03; H10D84/038; H10D88/00; H10D88/01; Y; Y10; Y10S; Y10S438/00; Y10S438/967

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 156 words
A method for producing a semiconductor device having a silicon-on-insulator structure, comprising the steps of: depositing a first insulation film on a silicon substrate by a chemical vapor deposition process; patterning said first insulation film so as to be left in a silicon-on-insulator (SOI) element region, a portion of said silicon substrate having no first insulation film thereon serving as a bulk element region; depositing a polysilicon layer on the entire surface of said silicon substrate; patterning said polysilicon layer so as to be left on said patterned first insulation film, a portion of said patterned polysilicon layer serving as an active region; and simultaneously forming second and third insulation films for use in element insulation in said silicon substrate and said patterned polysilicon layer, respectively, by a local-oxidation-of-silicon (LOCOS) process, so that said bulk element region is surrounded by said second insulation film, and said SOI element region is surrounded by said third insulation film.
Claim 2
Independent Claim 156 words
A method for producing a semiconductor device having a silicon-on-insulator structure, comprising the steps of: depositing a first insulation film on a silicon substrate by a chemical vapor deposition process; patterning said first insulation film so as to be left in a silicon-on-insulator (SOI) element region, a portion of said silicon substrate having no first insulation film thereon serving as a bulk element region; depositing a polysilicon layer on the entire surface of said silicon substrate; patterning said polysilicon layer so as to be left on said patterned first insulation film, a portion of said patterned polysilicon layer serving as an active region; and simultaneously forming second and third insulation films for use in element insulation in said silicon substrate and said patterned polysilicon layer, respectively, by a local-oxidation-of-silicon (LOCOS) process, so that said bulk element region is surrounded by said second insulation film, and said SOI element region is surrounded by said third insulation film.
Claim 3
Dependent Claim 30 words
A method as claimed in claim 1, wherein said silicon substrate comprises a thermal oxidation film formed thereon, and said first insulation film is formed on said thermal oxidation film.
Claim 4
Dependent Claim 42 words
A method as claimed in claim 1, further comprising a step of forming a thermal oxidation film on the portion of said silicon substrate having no first insulation film thereon, and then the step of depositing the polysilicon layer is carried out.
Claim 5
Dependent Claim 30 words
A method as claimed in claim 1, further comprising a step of forming a sidewall film in a stepped portion between said bulk element region and said SOI element region.
Claim 6
Dependent Claim 17 words
A method as claimed in claim 1, further comprising a step of recrystallizing said patterned polysilicon layer.
Claim 7
Dependent Claim 14 words
A method as claimed in claim 1, wherein said polysilicon layer comprises impurity-doped polysilicon.

References Cited (Backward Citations)

US4217153A Cited
JPS54990A Cited
US4221044A Cited
US4221045A Cited
JPS5710248A Cited
JPS60245211A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1992-12-25 1993-06-26 1993-12-26 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1996-12-25 1997-06-26 1997-12-26 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2000-12-25 2001-06-26 2001-12-26 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag