Rearrangeable multiconnection switching networks constructed using combinatorial designs

Claim 2

A switching network for selectively connecting N 1 input channels to n 2 output channels such that none of said n 2 output channels is connected to more than one of said N 1 input channels at any time, N 1 and n 2 being positive integers each greater than one, n 2 being at most equal to N 1 , said switching network comprising v first stage switches each having at most r inlets and at least one outlet and each comprising means for selectively connecting any one of the inlets of said each first stage switch to the at least one outlet of said each first stage switch, v being a positive integer at least equal to n 2 , r being a positive integer greater than one. a second stage switch having n 2 outlets each connected to a different one of said output channels and having a plurality of inlets each associated with a different one of said first stage switches and each being connected to the at least one outlet of the associated first stage switch, said second stage switch comprising means for selectively connecting said outlets of said second stage switch to said inlets of said second stage switch and connection means for connecting each of said inlets of said first stage switches to only an associated predetermined one of said input channels in accordance with a (b,c,r,M,w) block design, where each of said first stage switches has a unique switch designation, where b,c and M are positive integers each greater than one, where w is a positive integer, where M+w is greater than three, where b is at least equal to v, where c is at least equal to N 1 , where the elements of said block are the switch designations of said first stage switches, and having the switch designation in a given row of said block design define the ones of said first stage switches connected to a given input channel associated with said given row.

Claim 3

A switching network in accordance with claim 1 wherein n 2 is at most equal to (M 2 -1)/w +1.

Claim 4

A switching network in accordance with claim 1 wherein said connection means connects each of said inlets of said first stage switches to an associated predetermined one of said input channels such that for any group of n 2 of said input channels, where is a group of n 2 of said first stage switches each having one inlet connected to a different one of the group of n 2 of said input channels.

Claim 5

A switching network in accordance with claim 1 wherein said first stage switches each have at least x outlets and comprise means for selectively connecting the outlets of said each first stage switch to the inlets of said each first stage switch, x being a positive integer greater than one, and wherein said plurality of inlets of said second stage switch comprises a plurality of groups of x inlets, each group of x inlets being associated with a different one of said first stage switches and each group of x inlets being connected to the at least x outlets of the associated first stage switch.

Claim 6

A switching network in accordance with claim 4 wherein n 2 is at most equal to x[ (xM+1)(M-1)/w +1].

Claim 7

A switching network in accordance with claim 1 wherein said first stage switches and said second stage switch each comprise a rectangular array of crosspoints.

Claim 8

A switching network for selectively connecting N 1 input channels to n 2 output channels such that none of said n 2 output channels is connected to more that one of said N 1 input channels at any time, N 1 and n 2 being positive integers each greater than one, n 2 being at most equal to N 1 , said switching network comprising v first stage switches each having at most r inlets and at least x outlets and each comprising means for selectively connecting the outlets of said each first stage switch to the inlets of said each first stage switch, v being a positive integer at least equal to n 2 , x and r being positive integers each greater than one, a second stage switch having n 2 outlets each connected to a different one of said output channels and having a plurality of inlets comprising a plurality of groups of x inlets, each group of x inlets being associated with a different one of said first stage switches and each group of x inlets being connected to the at least x outlets of the associated first stage switch, said second stage switch comprising means for selectively connecting said outlets of said second stage switch to said inlets of said second stage switch and connection means for connecting each of said inlets of said first stage switches to only an associated predetermined one of said input channels in accordance with a (b,c,r,M,1) block design, where each of said first stage switches has a unique switch designation, where b,c and M are positive integers each greater than one, where b is at least equal to v, where c is at least equal to N 1 , where the elements of said block design are the switch designations of said first stage switches, and having the switch designations in a given row of said block design define the ones of said first stage switches connected to a given input channel associated with said given row.

Claim 9

A switching network for selectively connecting N 1 input channels to n 2 output channels such that none of said n 2 output channels is connected to more that one of said N 1 input channels at any time, N 1 and n 2 being positive integers each greater than one, n 2 being at most equal to N 1 , said switching network comprising v first stage switches each having at most r inlets and at least x outlets and each comprising means for selectively connecting the outlets of said each first stage switch to the inlets of said each first stage switch, v being a positive integer at least equal to n 2 , x and r being positive integers each greater than one, a second stage switch having n 2 outlets each connected to a different one of said output channels and having a plurality of inlets comprising a plurality of groups of x inlets, each group of x inlets being associated with a different one of said first stage switches and each group of x inlets being connected to the at least x outlets of the associated first stage switch, said second stage switch comprising means for selectively connecting said outlets of said second stage switch to said inlets of said second stage switch and connection means for connecting each of said inlets of said first stage switches to only an associated predetermined one of said input channels in accordance with a (b,c,r,M,1) block design, where each of said first stage switches has a unique switch designation, where b,c and M are positive integers each greater than one, where b is at least equal to v, where c is at least equal to N 1 , where the elements of said block design are the switch designations of said first stage switches, and having the switch designations in a given row of said block design define the ones of said first stage switches connected to a given input channel associated with said given row.

Claim 10

A switching network for selectively connecting N 1 input channels to N 2 output channels such that none of said N 2 output channels is connected to more than one of said N 1 input channels at any time, N 1 and N 2 being positive integers each greater than one, said switching network comprising v first stage switches each having at most r inlets and a plurality of outlets and each comprising means for selectively connecting the outlets of said each first stage switch to the inlets of said each first stage switch, v being a positive integer at least equal to a positive integer, n 2 , that is less than N 2 and at most equal to N 1 , r being a positive integer greater than one, a plurality of second stage switches each having n 2 outlets that are each connected to a different one of said output channels and having a plurality of inlets each associated with a different one of said plurality of first stage switches and each being connected to one of the outlets of the associated first stage switch, each of said plurality of second stage switches comprising means for selectively connecting the outlets of said each second stage switch to the inlets of said each second stage switch and connection means for connecting each of said inlets of said first stage switches to only an associated predetermined one of said input channels in accordance with a (b,c,r,M,w) block design, where each of said first stage switches has a unique switch designation, where b, c and M are positive integers each greater than one, where w is a positive integer, where M +w is greater than three, where b is a least equal to v, where c is at least equal to N 1 , where the elements of said block design are the switch designations of said first stage switches, and having the switch designations in a given row of said block design define the ones of said first stage switches connected to a given input channel associated with said given row.

Claim 11

A switching network for selectively connecting N 1 input channels to N 2 output channels such that none of said N 2 output channels is connected to more than one of said N 1 input channels at any time, N 1 and N 2 being positive integers each greater than one, said switching network comprising v first stage switches each having at most r inlets and a plurality of outlets and each comprising means for selectively connecting the outlets of said each first stage switch to the inlets of said each first stage switch, v being a positive integer at least equal to a positive integer, n 2 , that is less than N 2 and at most equal to N 1 , r being a positive integer greater than one, a plurality of second stage switches each having n 2 outlets that are each connected to a different one of said output channels and having a plurality of inlets each associated with a different one of said plurality of first stage switches and each being connected to one of the outlets of the associated first stage switch, each of said plurality of second stage switches comprising means for selectively connecting the outlets of said each second stage switch to the inlets of said each second stage switch and connection means for connecting each of said inlets of said first stage switches to only an associated predetermined one of said input channels in accordance with a (b,c,r,M,w) block design, where each of said first stage switches has a unique switch designation, where b, c and M are positive integers each greater than one, where w is a positive integer, where M +w is greater than three, where b is a least equal to v, where c is at least equal to N 1 , where the elements of said block design are the switch designations of said first stage switches, and having the switch designations in a given row of said block design define the ones of said first stage switches connected to a given input channel associated with said given row.

Claim 12

A switching network in accordance with claim 8 wherein n 2 is at most equal to (M 2 -1)/w +1.

Claim 13

A switching network in accordance with claim 8 wherein said connection means connects each of said inlets of said first stage switches to an associated predetermined one of said input channels such that for any group of n 2 of said input channels, there is a group of n 2 of said first stage switches each having one inlet connected to a different one of that group of n 2 of said input channels.

Claim 14

A switching network in accordance with claim 8 wherein said first stage switches each have at least x outlets and comprise means for selectively connecting the outlets of said each first stage switch to the inlets of said each first stage switch, x being a positive integer greater than one, and wherein said plurality of inlets of each second stage switch comprises a plurality of groups of x inlets, each group of x inlets being associated with a different one of said first stage switches and each group of x inlets being connected to the at least x outlets of the associated first stage switch.

Claim 15

A switching network in accordance with claim 11 wherein n 2 is at most equal to x[ (xM+1)(M-1)/w +1].

Claim 16

A switching network in accordance with claim 8 wherein said first and second stage switches each comprise a rectangular array of crosspoints.

Claim 17

A switching network for selectively connecting N 1 input channels to N 2 output channels such that none of said N 2 output channels is connected to more than one of said N 1 input channels at any time, N 1 and N 2 being positive integers each greater than one, said switching network comprising v first stage switches each having at most r inlets and at least x outlets and each comprising means for selectively connecting the outlets of said each first stage switch to the inlets of said each first stage switch, v being a positive integer at least equal to a positive integer, n 2 , that is less than N 2 and at most equal to N.sub., x and r being positive integers each greater than one, a plurality of second stage switches each having n 2 outlets that are each connected to a different one of said output channels and having a plurality of inlets comprising a plurality of groups of x inlets, each group of x inlets being associated with a different one of said first stage switches and each group of x inlets being connected to the at least x outlets of the associated first stage switch, each of said plurality of second stage switches comprising means for selectively connecting the outlets of said each second stage switch to the inlets of said each second stage switch and connection means for connecting each of said inlets of said first stage switches to only an associated predetermined one of said input channels in accordance with a (b,c,r,M,1) block design, where each of said first stage switches has a unique switch designation, where b, c and M are positive integers each greater than one, where b is at least equal to v, where c is at least equal to N 1 , where the elements of said block design are the switch designations of said first stage switches, and having the switch designations in a given row of said block design define the ones of said first stage switches connected to a given input channel associated with said given row.

Claim 18

A switching network for selectively connecting N 1 input channels to N 2 output channels such that none of said N 2 output channels is connected to more than one of said N 1 input channels at any time, N 1 and N 2 being positive integers each greater than one, said switching network comprising v first stage switches each having at most r inlets and at least x outlets and each comprising means for selectively connecting the outlets of said each first stage switch to the inlets of said each first stage switch, v being a positive integer at least equal to a positive integer, n 2 , that is less than N 2 and at most equal to N.sub., x and r being positive integers each greater than one, a plurality of second stage switches each having n 2 outlets that are each connected to a different one of said output channels and having a plurality of inlets comprising a plurality of groups of x inlets, each group of x inlets being associated with a different one of said first stage switches and each group of x inlets being connected to the at least x outlets of the associated first stage switch, each of said plurality of second stage switches comprising means for selectively connecting the outlets of said each second stage switch to the inlets of said each second stage switch and connection means for connecting each of said inlets of said first stage switches to only an associated predetermined one of said input channels in accordance with a (b,c,r,M,1) block design, where each of said first stage switches has a unique switch designation, where b, c and M are positive integers each greater than one, where b is at least equal to v, where c is at least equal to N 1 , where the elements of said block design are the switch designations of said first stage switches, and having the switch designations in a given row of said block design define the ones of said first stage switches connected to a given input channel associated with said given row.