US4885515A
Expired / Lapsed
US
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Velocity control apparatus
Assignee: Fanuc Corp
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Filing: 1987-12-11
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Granted: 1989-12-05
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Expires: 2007-12-11
Abstract
Abstract A velocity control apparatus according to the invention is used in order to acccept feedback data, for velocity control of a servomotor or the like. The disclosed apparatus provides velocity information in the form of discrete data from a pulse coder or the like, and forms a prescribed control command by digitally processing the data in a microprocessor. In a case where the above mentioned data are sampled at a predetermined sampling rate during a processing period so as to accommodate processing by the microprocessor, a lag element results when the data are accepted within the computer as velocity information which causes an inaccuracy in servomotor control. Accordingly, a detection signal forming unit (5) processes the discrete count data as the sum of count data synchronized to the sampling rate which is the processing period subdivided into a fraction, in which fraction the denominator is an integer. The detection signal forming unit (5) supplies a velocity processing block (3b) with velocity data, at the predetermined sampling rate, as the latest velocity data. Thus, the influence of the lag element can be reduced to a great extent and the capability of the microprocessor can be made to fully manifest itself, thereby enabling accurate velocity control.
Inventors
- 👤 Mitsuo Kurakake
- 👤 Keiji Sakamoto
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 09:15
CPC Classifications
H; H02; H02P; H02P5/00; G; G05; G05B; G05B19/00; G05B19/02; G05B19/18; G05B19/414; G05B19/4141; G05B19/19; G05B19/21; G05B19/23; G05B19/231; G05B19/237; G05B19/4142; H02P23/00; H02P23/22; G05B2219/00; G05B2219/30; G05B2219/37; G05B2219/37525; G05B2219/41; G05B2219/41421; G05B2219/42; G05B2219/42256; Y; Y10; Y10S; Y10S388/00; Y10S388/907; Y10S388/912
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
165 words
A velocity control apparatus forming discrete velocity information by receiving and processing a pulse signal fed back from a servomotor for controlling the velocity of the servomotor, comprising: velocity control arithmetic means, connected to the servomotor, for generating a velocity control signal to control the servomotor; sampling means for receiving and sampling the pulse signal at a sampling period corresponding to a processing period of said velocity information; received and sampled pulses occurring in a length of time which is equivalent to the processing period divided by an integer; memory means for storing plural items of count data corresponding to the received and sampled pulses counted during the sampling period by said counting means, the count data being stored by said memory means while being successively updated with a most recent count data; and arithmetic means for adding a predetermined number of the count data from said memory means and supplying a result of the addition as velocity information to said velocity control arithmetic means.
Claim 2
Dependent Claim
165 words
A velocity control apparatus forming discrete velocity information by receiving and processing a pulse signal fed back from a servomotor for controlling the velocity of the servomotor, comprising: velocity control arithmetic means, connected to the servomotor, for generating a velocity control signal to control the servomotor; sampling means for receiving and sampling the pulse signal at a sampling period corresponding to a processing period of said velocity information; received and sampled pulses occurring in a length of time which is equivalent to the processing period divided by an integer; memory means for storing plural items of count data corresponding to the received and sampled pulses counted during the sampling period by said counting means, the count data being stored by said memory means while being successively updated with a most recent count data; and arithmetic means for adding a predetermined number of the count data from said memory means and supplying a result of the addition as velocity information to said velocity control arithmetic means.
Claim 3
Dependent Claim
38 words
A velocity control apparatus according to claim 1, wherein said arithmetic means comprises means for weighting and processing the count data occurring in a latest sampling period and the count data from said memory means as velocity information.
Claim 4
Dependent Claim
21 words
A velocity control apparatus according to claim 1, wherein said velocity control apparatus comprises a microcomputer forming a software servo system.
Claim 5
Dependent Claim
28 words
A velocity control apparatus according to claim 1, wherein the sampling period of said sampling means comprises one-fourth of the processing period, whereby discrete velocity information is formed.
Claim 6
Independent Claim
109 words
An apparatus generating control signals for controlling a servomotor during a processing period, said apparatus comprising: a pulse coder connected to the servomotor and generating a position signal having pulses corresponding to a rotational position of the servomotor; counter means for counting the pulses of said position signal at a predetermined sampling rate and generating count data corresponding to the counted pulses; register means receiving the count data for storing and successively providing the stored count data in accordance with said predetermined sampling rate; and arithmetic means for summing a predetermined number of the most recent occurring count data and providing an inverse sum value as the control signals.
Claim 7
Independent Claim
109 words
An apparatus generating control signals for controlling a servomotor during a processing period, said apparatus comprising: a pulse coder connected to the servomotor and generating a position signal having pulses corresponding to a rotational position of the servomotor; counter means for counting the pulses of said position signal at a predetermined sampling rate and generating count data corresponding to the counted pulses; register means receiving the count data for storing and successively providing the stored count data in accordance with said predetermined sampling rate; and arithmetic means for summing a predetermined number of the most recent occurring count data and providing an inverse sum value as the control signals.
Claim 8
Dependent Claim
28 words
An apparatus according to claim 5, wherein said apparatus comprises a microcomputer and said predetermined sampling rate comprises a time equal to a fraction of the processing period.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1992-12-04 | 1993-06-05 | 1993-12-05 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-12-04 | 1997-06-05 | 1997-12-05 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-12-04 | 2001-06-05 | 2001-12-05 | $7700.00 | Window Closed / Lapsed |