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US4879661A Expired / Lapsed US ⏱️ 0.0 years remaining

Bi-directional circuit to interface between a low current device and high current tester

Assignee: International Business Machines Corp
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Filing: 1987-10-02
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Granted: 1989-11-07
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Expires: 2007-10-02
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Abstract

Abstract A circuit to function as an interface between larger test instrumentation having a high capacitance, including connecting leads, and a small, low current, monolithic chip device. This interface circuit has no internal control logic, is capable of transactions in both directions and is small itself, thereby fitting close to the monolithic chip device and reflecting a relatively low capacitance load to the chip. The interface circuit includes an input buffer amplifier connected to provide a driving voltage to drive the test instrumentation in response to a voltage from the small monolithic chip device, and a sensing resistor is connected with the input buffer amplifier so that their combined equivalent resistance value is substantially equal to the resistance reflected by the test instrumentation. An operational amplifier is connected to drive a small monolithic chip device in response to a voltage across the sensing resistor that is developed by the test instrumentation.

Inventors

  • 👤 Floyd W. Olsen

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 14:53
CPC Classifications
G; G01; G01R; G01R31/00; G01R31/28; G01R31/2851; G01R31/2886; G01R31/2889; G01R31/317; G01R31/3181; G01R31/319; G01R31/31903; G01R31/31905

Claims Analysis

Total Claims: 13
Claim 1
Independent Claim 132 words
An interface circuit for connecting test instrumentation reflecting at least 100 pico farads of capacitive loading at its terminals, to test a low current monolithic device, said interface circuit comprising: input buffer amplifier means with an input terminal connected to a device under test to provide a driving voltage at an output terminal to drive said test instrumentation in response to a voltage output from said low current monolithic device; sensing resistance means connected with said input buffer amplifier means for matching, along with an internal resistance of said input buffer amplifier means, a resistance reflected by said test instrumentation; and operational amplifier circuit means in said interface circuit connected to drive said monolithic device in response to a voltage across said sensing resistance means that is developed by said test instrumentation.
Claim 2
Dependent Claim 132 words
An interface circuit for connecting test instrumentation reflecting at least 100 pico farads of capacitive loading at its terminals, to test a low current monolithic device, said interface circuit comprising: input buffer amplifier means with an input terminal connected to a device under test to provide a driving voltage at an output terminal to drive said test instrumentation in response to a voltage output from said low current monolithic device; sensing resistance means connected with said input buffer amplifier means for matching, along with an internal resistance of said input buffer amplifier means, a resistance reflected by said test instrumentation; and operational amplifier circuit means in said interface circuit connected to drive said monolithic device in response to a voltage across said sensing resistance means that is developed by said test instrumentation.
Claim 3
Dependent Claim 45 words
An interface circuit as defined in claim 1 wherein said operational amplifier circuit means has a gain determined by the relationship: ##EQU4## where: A=maximum current force to D.U.T. B=sensing resistor percentage (op-amp out) C=op-amp output divider's "R" equivalent D=by-pass diode drop @ current A, above.
Claim 4
Dependent Claim 40 words
An interface circuit as defined in claim 1 including operating voltage control means connected to be responsive to an output from said test instrumentation to provide common mode voltage tracking for a supply voltage to said operational amplifier circuit means.
Claim 5
Dependent Claim 52 words
An interface circuit as defined in claim 3 wherein said operating voltage control circuit functions in accordance with the relationship: V.sub.f =A+BI.sub.f +C ln I.sub.f where: V f =the voltage forward A=a constant (voltage before conduction) B=electrical resistance, forward C=a constant, from manufacturer I=electric current in direction of arrow ln=natural log function.
Claim 6
Dependent Claim 44 words
An interface circuit as defined in claim 3 wherein said operating voltage control circuit means includes a plurality of diodes connected in a predetermined relationship to provide incremental current limited switching for a drive voltage transition from said test instrumentation to said monolithic device.
Claim 7
Dependent Claim 33 words
An interface circuit as defined in claim 5 wherein at least some of said plurality of diodes are connected to provide a current control path for said test instrumentation to said monolithic device.
Claim 8
Dependent Claim 36 words
An interface circuit as defined in claim 5 wherein at least some of said pluraity of diodes are connected as overshoot clamp diodes to remove any overshoot from an output of said operational amplifier circuit means.
Claim 9
Dependent Claim 44 words
An interface circuit as defined in claim 3 including another buffer amplifier means connected in said voltage control circuit means to provide a predetermined steering for said supply voltage to said operational amplifier circuit means and to provide a referenced termination for any overshoot.
Claim 10
Dependent Claim 48 words
An interface circuit as defined in claim 8 including output buffer amplifier means connected at an output from said operational amplifier circuit means to provide trim drive to remove at least a predetermined portion of a voltage drop in signals from said test instrumentation to said monolithic device.
Claim 11
Dependent Claim 36 words
An interface circuit as defined in claim 9 including transformer means connected at the output of said operational amplifier circuit means to provide an in-phase voltage of said monolithic device to said output buffer amplifier means.
Claim 12
Dependent Claim 27 words
An interface circuit as defined in claim 10 including by-pass circuit means to provide a predetermined by-pass for test instrumentation drive voltage transition to said monolithic device.
Claim 13
Dependent Claim 34 words
An interface circuit as defined in claim 10 including a capacitance means connected with an input side of said output buffer amplifier means to limit said output buffer amplifier means to a desired level.

References Cited (Backward Citations)

US4023097A Cited
US4255792A Cited
US4523312A Cited
US4502127A Cited
US4608647A Cited
US4630224A Cited
US4651088A Cited
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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1992-11-06 1993-05-08 1993-11-07 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1996-11-06 1997-05-08 1997-11-07 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2000-11-06 2001-05-08 2001-11-07 $7700.00 Window Closed / Lapsed

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