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US4878098A Expired / Lapsed US ⏱️ 0.0 years remaining

Semiconductor integrated circuit device

Assignee: Toshiba Corp
•
Filing: 1989-03-24
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Granted: 1989-10-31
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Expires: 2009-03-24
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Abstract

Abstract A semiconductor integrated circuit device according to the present invention comprises a chip substrate formed of a semiconductor. Formed on a surface of the chip substrate is an integrated circuit and a plurality of chip terminals which are located to the outside of the integrated circuit, so as to be connected thereto. An electrical insulating layer covers the entire surface of the chip substrate, and conductor leads equal in number to the chip terminals are formed on the insulating layer. One end of each conductor lead is connected to a corresponding chip terminal, and the other end thereof is formed having a connecting terminal whose surface area is greater than that of each chip terminal. The connecting terminals are distributed substantially over the entire surface of the insulating layer.

Inventors

  • 👤 Tamio Saito
  • 👤 Kunio Yosihara

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 15:46
CPC Classifications
H; H10; H10W; H10W72/00; H10W72/90; H10W20/00; H10W20/40; H10W20/45; H10W20/48; H10W70/00; H10W70/60; H10W70/62; H10W70/65; H10W70/654; H10W70/656; H10W72/50; H10W72/59; H10W72/941; H10W72/942

Claims Analysis

Total Claims: 11
Claim 1
Independent Claim 280 words
A semicondcutor integrated circuit device, comprising: a circuit frame; a plurality of carrier modules arranged and held on the same area in said circuit frame so as to be adjacent to one another, each of said carrier modules including a plurality of rectangular integrated circuit chips which are close to one another in a row on the same plane, each of said rectangular integrated circuit chips having a chip surface which is parallel to said plane, and a plurality of internal terminals arranged along a peripheral edge portion of the chip surface, the internal terminal being used for inputting and outputting data to and from said integrated circuit chip; an electrical insulating layer which covers the entire chip surface, except for the internal terminals; a plurality of conductor leads each of which is connected at one end to a corresponding inernal terminal of said plurality of internal terminals, said conductor leads extending along the insulating layer from the internal terminals towards a central portion of the chip surface, each of said conductor leads having a connecting terminal at its other end, said connecting terminal having an area wider than that of the corresponding internal terminal, said connecting terminals being distributed over the entire insulating layer, expect for those regions where the internal terminals are located; first connecting means for electrically connecting said coonnecting terminals in each of said carrier modules to module terminals of the carrier module and distributing the module terminals over a connecting surface which is parallel to said plane and exposed to the outside; and second connecting means for electrically connecting the module terminals of the respective carrier modules to one another and/or to another electrical device.
Claim 2
Dependent Claim 280 words
A semicondcutor integrated circuit device, comprising: a circuit frame; a plurality of carrier modules arranged and held on the same area in said circuit frame so as to be adjacent to one another, each of said carrier modules including a plurality of rectangular integrated circuit chips which are close to one another in a row on the same plane, each of said rectangular integrated circuit chips having a chip surface which is parallel to said plane, and a plurality of internal terminals arranged along a peripheral edge portion of the chip surface, the internal terminal being used for inputting and outputting data to and from said integrated circuit chip; an electrical insulating layer which covers the entire chip surface, except for the internal terminals; a plurality of conductor leads each of which is connected at one end to a corresponding inernal terminal of said plurality of internal terminals, said conductor leads extending along the insulating layer from the internal terminals towards a central portion of the chip surface, each of said conductor leads having a connecting terminal at its other end, said connecting terminal having an area wider than that of the corresponding internal terminal, said connecting terminals being distributed over the entire insulating layer, expect for those regions where the internal terminals are located; first connecting means for electrically connecting said coonnecting terminals in each of said carrier modules to module terminals of the carrier module and distributing the module terminals over a connecting surface which is parallel to said plane and exposed to the outside; and second connecting means for electrically connecting the module terminals of the respective carrier modules to one another and/or to another electrical device.
Claim 3
Dependent Claim 22 words
The device according to claim 1, wherein the module terminals of said first connecting means are distributed on the entire connecting surface.
Claim 4
Dependent Claim 16 words
The device according to claim 2, wherein said second connecting means comprises a flexible printed board.
Claim 5
Dependent Claim 17 words
The device according to claim 1, wherein each of said carriage modules includes four integrated circuit chips.
Claim 6
Dependent Claim 21 words
The device according to claim 1, wherein: said conductor leads are formed of a paste containing electrically highly conductive metal particles.
Claim 7
Dependent Claim 27 words
The device according to claim 5, wherein: a plating layer of electrically highly conductive metal is formed on the connecting terminal of each of said conductor leads.
Claim 8
Dependent Claim 30 words
The device according to claim 5, wherein: said connecting terminals of said conductor leads are formed of a paste prepared by mixing electrically highly conductive metal particles and heat-softening resin.
Claim 9
Dependent Claim 15 words
The device according to claim 1, wherein: said insulating layer is formed of light-setting resin.
Claim 10
Dependent Claim 32 words
The device according to claim 8, further comprising a second insulating layer, covering the entire region of said first insulating layer except for the connecting terminal of each of said conductor leads.
Claim 11
Dependent Claim 16 words
The device acording to claim 9, wherein: said second insulating layer is formed of light-setting resin.

References Cited (Backward Citations)

US3623961A Cited
US4528064A Cited
US4472730A Cited
US4543715A Cited
US4706167A Cited
US4667220A Cited
JPS60252992A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1992-10-30 1993-05-01 1993-10-31 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1996-10-30 1997-05-01 1997-10-31 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2000-10-30 2001-05-01 2001-10-31 $7700.00 Window Closed / Lapsed

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