Synchronizing system for digital apparatus

Claim 1

A synchronizing system for use with a plurality of digital signal reproducers comprising; a plurality of digital signal reproducers, each producing an output signal and having a digital I/O modulator, a digital I/O demodulator and a decoder for producing decoded data, a digital signal multiplexer supplied with the output signals from said plurality of digital signal reproducers, and for producing a frame synchronizing signal and a multiplex output signal, said digital signal multiplexer including means for generating a clock pulse and a word synchronizing signal, a digital I/O modulator, and digital I/O demodulator for each of said reproducers, circuit connecting means for interfacing the digital I/O modulator of said digital signal multiplexer and each digital I/O demodulator of said plurality of digital signal reproducers, so as to supply a demodulated clock pulse and a word synchronizing signal to each decoder thereof, and circuit connecting means for interfacing said digital I/O modulator of each of said plurality of digital signal reproducers and the respective digital I/O demodulator of said digital signal multiplexer so as to transmit said decoded data of each said decoder to said digital signal multiplexer, said digital signal multiplexer producing a time-division multiplex signal arranged in a frame format including; (a) a word synchronizing signal, (b) a service bit signal indicating a transmission mode, and (c) a channel of digital data whereby the digital signals from said plurality of digital reproducers are multiplexed as indicated by said service bit signal.