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US4876223A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of manufacturing semiconductor devices

Assignee: Toshiba Corp
•
Filing: 1988-10-20
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Granted: 1989-10-24
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Expires: 2008-10-20
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Abstract

Abstract A method of manufacturing a semiconductor device whereby a wiring material is filled within a recess of an insulating film, with the upper surface of the wiring material being uneven, a coating film being evenly deposited on the wiring material, the wiring material and the coating film being etched with tetra-methyl-guanidine having the same etching speed with respect to the wiring material and the coating film in such a manner that the upper surface of the wiring material filled within the recess is made substantially flat and substantially flush with the upper surface of the insulating film. A tetra-methyl-guanide may be used which has a higher etching speed with respect to the wiring material than the coating film. In this case, the wiring material has an indentation above the recess, and the coating film is thick above the recess and thin above the insulating film. Therefore, the wiring material within the recess is etched in such a manner that the upper surface of the wiring material within the recess is made flat and substantially flush with the upper surface of the insulating film.

Inventors

  • 👤 Takashi Yoda
  • 👤 Tohru Watanabe

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 20:15
CPC Classifications
H; H10; H10P; H10P50/00; H10P50/20; H10P50/28; H10P50/286; H10P50/287; H10P50/60; H10P50/66; H10P50/663; H10P50/667; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/062; Y; Y10; Y10S; Y10S148/00; Y10S148/051

Claims Analysis

Total Claims: 11
Claim 1
Independent Claim 196 words
A method of manufacturing a semiconductor device comprising the steps of: forming an insulating film on a semiconductor substrate; forming a recess such as a contact hole, wiring trench or the like in said insulating film; forming a wiring material film on said insulating film and said recess to fill said wiring material at least within said recess; coating a coating film on the surface of said wiring material film in a manner to make the surface of said coating film flat; etching said coating film and said wiring material film sequentially, by using tetra-methyl-guanidine having the same etching speed with respect to said coating film and said wiring material film, to leave said wiring material film only within said recess and remove said wiring material film on said insulating film, in such a manner that the upper surface of said wiring material film left unetched within said recess is made substantially flush with the upper surface of said insulation film, and is made substantially flat; and forming another wiring material film on said wiring material film and said insulation film to obtain electric connection between said other wiring material film and said wiring material film.
Claim 2
Independent Claim 196 words
A method of manufacturing a semiconductor device comprising the steps of: forming an insulating film on a semiconductor substrate; forming a recess such as a contact hole, wiring trench or the like in said insulating film; forming a wiring material film on said insulating film and said recess to fill said wiring material at least within said recess; coating a coating film on the surface of said wiring material film in a manner to make the surface of said coating film flat; etching said coating film and said wiring material film sequentially, by using tetra-methyl-guanidine having the same etching speed with respect to said coating film and said wiring material film, to leave said wiring material film only within said recess and remove said wiring material film on said insulating film, in such a manner that the upper surface of said wiring material film left unetched within said recess is made substantially flush with the upper surface of said insulation film, and is made substantially flat; and forming another wiring material film on said wiring material film and said insulation film to obtain electric connection between said other wiring material film and said wiring material film.
Claim 3
Dependent Claim 35 words
A method according to claim 1, further comprising a step of forming a barrier layer within said recess and on said insulating film, between said recess forming step and said wiring material film filling process.
Claim 4
Dependent Claim 38 words
A method according to claim 1, wherein said wiring material film is made of Al, said coating film is a resist, and said tetra-methyl-guanidine is used at 22° C. and has an aqueous solution concentration of about 7%.
Claim 5
Dependent Claim 16 words
A method according to claim 3, wherein said coating film is made of a polyimide-based resin.
Claim 6
Dependent Claim 22 words
A method according to claim 1, wherein said insulating film is formed on said semiconductor substrate with an interlayer insulating interposed therebetween.
Claim 7
Independent Claim 196 words
A method of manufacturing a semiconductor device comprising the steps of: forming an insulating film on a semiconductor substrate; forming a recess such as a contact hole, wiring trench or the like in said insulating film; forming a wiring material film on said insulating film and said recess to fill said wiring material at least within said recess; coating a coating film on the surface of said wiring material film in a manner to make flat the surface of said coating film; etching said coating film and said wiring material film sequentially, by using tetra-methyl-guanidine having a higher etching speed with respect to said wiring material film than said coating film, to leave said wiring material film only within said recess and remove said wiring material film on said insulating film, in such a manner that the upper surface of said wiring material film left unetched within said recess is made substantially flush with the upper surface of said insulation film, and is made substantially flat; and forming another wiring material film on said wiring material film and said insulation film to obtain electric connection between said other wiring material film and said wiring material film.
Claim 8
Independent Claim 196 words
A method of manufacturing a semiconductor device comprising the steps of: forming an insulating film on a semiconductor substrate; forming a recess such as a contact hole, wiring trench or the like in said insulating film; forming a wiring material film on said insulating film and said recess to fill said wiring material at least within said recess; coating a coating film on the surface of said wiring material film in a manner to make flat the surface of said coating film; etching said coating film and said wiring material film sequentially, by using tetra-methyl-guanidine having a higher etching speed with respect to said wiring material film than said coating film, to leave said wiring material film only within said recess and remove said wiring material film on said insulating film, in such a manner that the upper surface of said wiring material film left unetched within said recess is made substantially flush with the upper surface of said insulation film, and is made substantially flat; and forming another wiring material film on said wiring material film and said insulation film to obtain electric connection between said other wiring material film and said wiring material film.
Claim 9
Dependent Claim 35 words
A method according to claim 6, further comprising a step of forming a barrier layer within said recess and on said insulating film, between said recess forming step and said wiring material film filling process.
Claim 10
Dependent Claim 38 words
A method according to claim 6, wherein said wiring material film is made of Al, said coating film is a resist, and said tetra-methyl-guanidine is used at 22° C. and has an aqueous solution concentration of about 15%.
Claim 11
Dependent Claim 16 words
A method according to claim 8, wherein said coating film is made of a polyimide-based resin.

References Cited (Backward Citations)

US4290668A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1992-10-23 1993-04-24 1993-10-24 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1996-10-23 1997-04-24 1997-10-24 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2000-10-23 2001-04-24 2001-10-24 $7700.00 Window Closed / Lapsed

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