Phase accumulation continuous phase modulator

Claim 2

A phase accumulator continuous phase modulator having a symbol input and a symbol clock input, said phase accumulator continuous phase modulator providing a phase state signal of said symbol input, said phase accumulator continuous phase modulator comprising: register means connected to said symbol input and to said symbol clock input, said register means operating to sequentially store a plurality of bits of each symbol; clock means connected to said symbol clock input and having a second input equal to the number of samples per symbol, said clock means operating to produce first and second clock signals; phase incrementing means connected to said register means and to said clock means, said phase incrementing means being operated in response to said first clock signal to produce a plurality of phase increment signals proportional to said symbols of said symbol input; and phase accumulator means connected to said phase incrementing means and to said clock means, said phase accumulator means being operated in response to said second clock signal to sequentially add each of said plurality of phase increment signals to produce said phase state signal.

Claim 3

A phase accumulator continuous phase modulator as claimed in claim 1, wherein said phase accumulator means includes two inputs and one output, said output of said phase accumulator means being connected to one of said inputs of said phase accumulator means.

Claim 4

A phase accumulator continuous phase modulator as claimed in claim 2, said clock means including first clock means operating to produce said second clock signal.

Claim 5

A phase accumulator continuous phase modulator as claimed in claim 3, wherein said clock means further includes counter means connected to said first clock means and to said phase incrementing means, said counter means operating in response to said second clock signal to produce said first clock signal.

Claim 6

A phase accumulator continuous phase modulator as claimed in claim 4, wherein there is further included: latching means connected to said output of said phase accumulator means and to said first clock means, said latching means being operated in response to said second clock signal to store said phase state signal; first conversion means connected to said latching means and being operated in response to said stored phase state signal to produce the sine of said phase state signal; and second conversion means connected to said latching means and being operated in response to said stored phase state signal to produce the cosine of said stored phase state signal.

Claim 7

A phase accumulator continuous phase modulator as claimed in claim 5, wherein there is further included multiplying means connected between said first clock means and said phase accumulator means, said multiplying means being operated in response to said second clock signal to produce a third clock signal which is said second clock signal multiplied by a predetermined constant L.

Claim 8

A phase accumulator continuous phase modulator as claimed in claim 6, said register means including a plurality of register device means serially connected and each register device means having an input and an output, said input of one register device means being connected to said symbol input and said output of said one register device means being connected to said input of a next one of said register device means, each of said register device means being connected to said symbol clock input, the number of register device means of said plurality being proportional to the frequency of said symbols.

Claim 9

A phase accumulator continuous phase modulator as claimed in claim 7, said phase incrementing device means including a plurality of phase incrementing means corresponding to said plurality of register device means, each of said phase incrementing device means being connected to said counter means and to a corresponding one of said register device means, each phase incrementing device means being sequentially operated in response to said first clock signal to produce a corresponding phase increment signal.

Claim 10

A phase accumulator continuous phase modulator as claimed in claim 8, wherein said phase accumulator means further includes multiplexer means connected between each of said plurality of phase incrementing device means and said phase accumulator means, said multiplexer means being operated to sequentially transmit said plurality of phase incrementing signals to said phase accumulator means.

Claim 11

A phase accumulator continuous phase modulator as claimed in claim 9, each of said register device means including D-type flip-flop means.

Claim 12

A phase accumulator continuous phase modulator as claimed in claim 10, each of said phase incrementing device means including preprogrammed Read-Only-Memory means.

Claim 13

A phase accumulator continuous phase modulator as claimed in claim 11, said first conversion means including preprogrammed Read-Only-Memory means and operating to produce said in-phase signal of said phase state signal.

Claim 14

A phase accumulator continuous phase modulator as claimed in claim 12, said second conversion means including preprogrammed Read-Only-Memory means and operating to produce said quadrature signal of said phase state signal.

Claim 15

A phase accumulator continuous phase modulator as claimed in claim 13, said plurality of register device means being equal to said predetermined constant L.

Claim 16

A phase accumulator continuous phase modulator as claimed in claim 14, said plurality of phase incrementing device means being equal to said predetermined constant L.

Claim 17

A phase accumulator continuous phase modulator having a symbol input, samples per symbol input and a symbol clock input, said phase accumulator continuous phase modulator providing a phase state signal of said symbol input, said phase accumulator continuous phase modulator comprising: register means connected to said symbol input and to said symbol clock input, said register means operating to sequentially store a plurality of bits of each symbol; clock means connected to said symbol clock input and having a second input equal to the number of samples per symbol, said clock means operating to produce first, second, third and fourth clock signals; phase incrementing means connected to said register means and to said clock means, said phase incrementing means being operated in response to said first, third and fourth clock signals to produce a plurality of phase increment signals proportional to said symbols of said symbol input; and phase accumulator means connected to said phase incrementing means and to said clock means, said phase accumulator means being operated in response to said third clock signal to sequentially add each of said plurality of phase increment signals to produce said phase state signal.

Claim 18

A phase accumulator continuous phase modulator having a symbol input, samples per symbol input and a symbol clock input, said phase accumulator continuous phase modulator providing a phase state signal of said symbol input, said phase accumulator continuous phase modulator comprising: register means connected to said symbol input and to said symbol clock input, said register means operating to sequentially store a plurality of bits of each symbol; clock means connected to said symbol clock input and having a second input equal to the number of samples per symbol, said clock means operating to produce first, second, third and fourth clock signals; phase incrementing means connected to said register means and to said clock means, said phase incrementing means being operated in response to said first, third and fourth clock signals to produce a plurality of phase increment signals proportional to said symbols of said symbol input; and phase accumulator means connected to said phase incrementing means and to said clock means, said phase accumulator means being operated in response to said third clock signal to sequentially add each of said plurality of phase increment signals to produce said phase state signal.

Claim 19

A phase accumulator continuous phase modulator as claimed in claim 16, wherein said phase accumulator means includes two inputs and one output, said output of said phase accumulator means being connected to one of said inputs of said phase accumulator means.

Claim 20

A phase accumulator continuous phase modulator as claimed in claim 17, wherein said clock means further includes: clock generator means connected to said symbol clock input, to said samples per symbol input, and to said phase incrementing means, said clock generator means operating to produce said first and said third clock signals; and multiplying means connected to said clock generator means, to said phase accumulator means and to said phase incrementing means, said multiplying means being operated in response to said first clock signal to produce said third clock signal for transmission to said phase accumulator means and to produce said fourth clock signal for transmission to said phase incrementing means.

Claim 21

A phase accumulator continuous phase modulator as claimed in claim 18, said register means including a plurality of register device means serially connected and each register device means having an input and an output, said input of one register device means being connected to said symbol input and said output of said one register device means being connected to said input of a next one of said register device means, each of said register device means being connected to said symbol clock input, the number of register device means of said plurality being proportional to the frequency of said symbols.

Claim 22

A phase accumulator continuous phase modulator as claimed in claim 19, said phase incrementing means including: multiplexer means connected to each of said plurality of register device means and to said multiplying means, said multiplexer means being operated in response to said fourth clock signal of said multiplying means to sequentially transmit said symbol input; and phase incrementing device means connected to said multiplexer means, to said phase accumulator means, to said multiplier means and to said clock generator means, said phase incrementing device means being operated in response to said second and to said fourth clock signals and to said transmitted symbol input to produce a corresponding phase increment signal.

Claim 23

A phase accumulator continuous phase modulator as claimed in claim 20, wherein there is further included: latching means connected to said output of said phase accumulator means and to said clock generator means, said latching means being operated in response to said first clock signal to store said phase state signal; first conversion means connected to said latching means and being operated in response to said stored phase state signal to produce the sine of said phase state signal; and second conversion means connected to said latching means and being operated in response to said stored phase state signal to produce the cosine of said stored phase state signal.

Claim 24

A phase accumulator continuous phase modulator as claimed in claim 21, each of said register device means including D-type flip-flop means.

Claim 25

A phase accumulator continuous phase modulator as claimed in claim 22, said phase incrementing device means including preprogrammed Read-Only-Memory means.

Claim 26

A phase accumulator continuous phase modulator as claimed in claim 23, said preprogrammed Read-only-Memory means including partitioned Read-only-Memory device means.

Claim 27

A phase accumulator continuous phase modulator as claimed in claim 24, said first conversion means including preprogrammed Read-Only-Memory means and operating to produce said in-phase signal of said phase state signal.

Claim 28

A phase accumulator continuous phase modulator as claimed in claim 25, said second conversion means including preprogrammed Read-Only-Memory means and operating to produce said quadrature signal of said phase state signal.

Claim 29

A phase accumulator continuous phase modulator as claimed in claim 26, said plurality of phase incrementing means being equal to said predetermined constant L.