US4872042A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semiconductor device
Assignee: Toshiba Corp
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Filing: 1984-07-13
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Granted: 1989-10-03
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Expires: 2004-07-13
Abstract
Abstract In a semiconductor device, a MOS transistor is formed in an island-like semiconductor region formed in a semiconductor substrate. The switching of the MOS transistor is controlled by changing a potential in the semiconductor region by means of a control circuit.
Inventors
- 👤 Satoshi Maeda
- 👤 Hiroshi Iwai
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 07:23
CPC Classifications
H; H10; H10D; H10D89/00; H10D89/60; H10D89/601; H10B; H10B12/00; H10B12/30; Y; Y10; Y10S; Y10S257/00; Y10S257/901
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
274 words
A semiconductor device comprising: a semiconductor substrate of a first conductivity type; a semiconductor well of a second conductivity type formed in said semiconductor substrate; an insulation film formed on said semiconductor well, said insulation film having a predetermined pattern for defining a plurality of element regions in said semiconductor well; a first high impurity concentration semiconductor region of said first conductivity type formed in each of said element regions; a second low impurity concentration semiconductor region of said first conductivity type formed in each of said element regions, said second low impurity concentration semiconductor region being separated from said first high impurity concentration semiconductor region by a predetermined distance; a thin insulation film formed on each of said element regions; an electrode formed on a first portion of said thin insulation film laying above said second low impurity concentration semiconductor region in each of said element regions and formed on a second portion in each of said element regions which is between said first high impurity concentration semiconductor region and said second low impurity concentration semiconductor region, said electrode, said first high impurity concentration semiconductor region, said second low impurity concentration semiconductor region and said thin insulation film forming a MOS transistor in each of said semiconductor regions, one portion of said electrode laying above said second low impurity concentration semiconductor region forming a capacitor electrode of each of said MOS transistors, and another portion of said electrode formed on said second portion forming a gate electrode of each of said MOS transistors; and means for controlling the switching of each of said MOS transistors by changing a potential of said semiconductor well.
Claim 2
Dependent Claim
274 words
A semiconductor device comprising: a semiconductor substrate of a first conductivity type; a semiconductor well of a second conductivity type formed in said semiconductor substrate; an insulation film formed on said semiconductor well, said insulation film having a predetermined pattern for defining a plurality of element regions in said semiconductor well; a first high impurity concentration semiconductor region of said first conductivity type formed in each of said element regions; a second low impurity concentration semiconductor region of said first conductivity type formed in each of said element regions, said second low impurity concentration semiconductor region being separated from said first high impurity concentration semiconductor region by a predetermined distance; a thin insulation film formed on each of said element regions; an electrode formed on a first portion of said thin insulation film laying above said second low impurity concentration semiconductor region in each of said element regions and formed on a second portion in each of said element regions which is between said first high impurity concentration semiconductor region and said second low impurity concentration semiconductor region, said electrode, said first high impurity concentration semiconductor region, said second low impurity concentration semiconductor region and said thin insulation film forming a MOS transistor in each of said semiconductor regions, one portion of said electrode laying above said second low impurity concentration semiconductor region forming a capacitor electrode of each of said MOS transistors, and another portion of said electrode formed on said second portion forming a gate electrode of each of said MOS transistors; and means for controlling the switching of each of said MOS transistors by changing a potential of said semiconductor well.
Claim 3
Dependent Claim
36 words
A semiconductor device according to claim 1, wherein said element regions are arrayed in a matrix, a first plurality of said element regions arranged in a row and being connected in common in said semiconductor layer.
Claim 4
Dependent Claim
28 words
A semiconductor device according to claim 2, wherein a second plurality of said element regions are arranged in a column and connected in common in said semiconductor layer.
References Cited (Backward Citations)
US3447046A
Cited
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| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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