US4868519A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Microprocessor-controlled amplifier
Assignee: DNIC BROKERAGE COMPANY A CORP OF
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Filing: 1988-11-02
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Granted: 1989-09-19
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Expires: 2008-11-02
Abstract
Abstract An amplifier circuit having an FET connected in series with a resistor coupled to a constant voltage source, coupled between a pair of amplifiers, such as audio amplifiers in a two-stage amplifying circuit. The FET specifically and directly determines the amount of gain of the two-stage amplifier, or the like. R DS of the FET is continually monitored by its connection to one input of an amplifier serving as a comparator, with the other input thereof serving as a reference voltage derived from a modulated signal emanating from a microprocessor. Each of the signals V DS , and the reference from the microprocessor is filtered through a low pass filter to remove the audio, or other cyclical signals, and, in the latter case, in order to provide a substantially constant reference voltage to the input of the comparator. The output of the comparator is coupled to an RC circuit, the capacitor thereof being continually charged and discharged in response to the state of the output of the comparator. The output from the RC circuit is coupled to the FET to define the gate voltage of V GS thereof, which in turn determines the value of R DS , to thereby continually alter R DS , to thereby provide the gain so desired and specifically required in the amplifying circuitry. Such value is inherently defined by the modulated reference signal emanating from the microprocessor.
Inventors
- 👤 James E. Shafer
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 17:34
CPC Classifications
H; H03; H03G; H03G3/00; H03G3/02; H03G3/04
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
342 words
An amplifier circuit comprising a pair of amplifiers connected in dual stage format, a field-effect transistor operatively coupled to an input of one amplifier of said pair for controlling the gain thereof; means for monitoring the operating resistance of said field-effect transistor; and means responsive to said means for monitoring for adjusting the gate voltage of said field-effect transistor to thereby change said operating resistance of said field-effect transistor to achieve a desired and steady value thereof, whereby the gain of said at least one amplifier is held at a substantially constant value; said means for monitoring comprising a first resistor connected in series with the drain of said field-effect transistor, said first resistor being coupled to a direct voltage source; said first resistor and said field-effect transistor being coupled between the output of a first one of said dual stage amplifier and an input of the second one of said dual stage amplifier; said means responsive to said means for monitoring comprising a comparator having a first input to which is coupled the drain of said field-effect transistor, said comparator having a second input to which is coupled a reference signal, said comparator having an output, said output of said comparator switching between two logic levels; said means responsive to said means for monitoring further comprising an averaging circuit coupled between the output of said comparator and the gate of said field-effect transistor, said averaging circuit being continually charged and discharged in response to the state of said output of said comparator to continually increase or decrease the value of said gate voltage indicative of the value desired of operating resistive R DS of said field-effect transistor; and a microprocessor for generating said reference signal, said reference signal comprising a pulse-width modulated signal the duty cycle of which may be varied between 0% and 100%; said reference signal being adjustably alterable to a desired value by varying said duty cycle of said signal, whereby the operating resistance R DS field-effect transistor may achieve a desired value commensurate with the desired gain.
Claim 2
Dependent Claim
342 words
An amplifier circuit comprising a pair of amplifiers connected in dual stage format, a field-effect transistor operatively coupled to an input of one amplifier of said pair for controlling the gain thereof; means for monitoring the operating resistance of said field-effect transistor; and means responsive to said means for monitoring for adjusting the gate voltage of said field-effect transistor to thereby change said operating resistance of said field-effect transistor to achieve a desired and steady value thereof, whereby the gain of said at least one amplifier is held at a substantially constant value; said means for monitoring comprising a first resistor connected in series with the drain of said field-effect transistor, said first resistor being coupled to a direct voltage source; said first resistor and said field-effect transistor being coupled between the output of a first one of said dual stage amplifier and an input of the second one of said dual stage amplifier; said means responsive to said means for monitoring comprising a comparator having a first input to which is coupled the drain of said field-effect transistor, said comparator having a second input to which is coupled a reference signal, said comparator having an output, said output of said comparator switching between two logic levels; said means responsive to said means for monitoring further comprising an averaging circuit coupled between the output of said comparator and the gate of said field-effect transistor, said averaging circuit being continually charged and discharged in response to the state of said output of said comparator to continually increase or decrease the value of said gate voltage indicative of the value desired of operating resistive R DS of said field-effect transistor; and a microprocessor for generating said reference signal, said reference signal comprising a pulse-width modulated signal the duty cycle of which may be varied between 0% and 100%; said reference signal being adjustably alterable to a desired value by varying said duty cycle of said signal, whereby the operating resistance R DS field-effect transistor may achieve a desired value commensurate with the desired gain.
Claim 3
Dependent Claim
15 words
The amplifier circuit according to claim 1, wherein said averaging circuit comprises an RC circuit.
Claim 4
Dependent Claim
102 words
The amplifier circuit according to claim 1, wherein said means for monitoring further comprises a first low-pass filter operatively coupled between drain of said field-effect transistor and said first input of said comparator for eliminating non-DC values, and a second low-pass filter operatively coupled between said second input of said comparator and said microprocessor for providing a constant DC reference voltage to said second input of said comparator, whereby said DC reference signal to said second input of said comparator may be continually altered to a desired value via the alteration of the duty cycle of said modulated signal from said microprocessor.
Claim 5
Dependent Claim
16 words
The amplifier circuitry according to claim 3, wherein said first low-pass filter filters out audio signals.
References Cited (Backward Citations)
US3631262A
Cited
GB1417982A
Cited
DE2403756A1
Cited
US4013975A
Cited
DE2650583A1
Cited
US4121183A
Cited
JPS5812413A
Cited
US4468631A
Cited
US4766395A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1992-09-18 | 1993-03-20 | 1993-09-19 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-09-18 | 1997-03-20 | 1997-09-19 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-09-18 | 2001-03-20 | 2001-09-19 | $7700.00 | Window Closed / Lapsed |