US4868350A
Expired / Lapsed
US
⏱️ 0.0 years remaining
High performance circuit boards
Assignee: International Business Machines Corp
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Filing: 1988-03-07
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Granted: 1989-09-19
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Expires: 2008-03-07
Abstract
Abstract The invention features a method of fabricating a printed circuit board having improved circuit board performance. The circuit board utilizes low dielectric materials having dielectric constants of less than 3.0. The dielectric layers are spaced apart from plated through-holes, thus eliminating the interface between the metallized surface of the through-hole and the dielectric sheet. Thus, the low dielectric layer is not required to be plated. The lower dielectric character of the laminates improves wiring density, circuit speed, and provides for thinner laminates and cores.
Inventors
- 👤 Joseph G. Hoffarth
- 👤 John P. Wiley
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 15:59
CPC Classifications
H; H05; H05K; H05K3/00; H05K3/46; H05K3/4611; H05K3/4641; H05K1/00; H05K1/02; H05K1/0213; H05K1/0237; H05K1/024; H05K3/44; H05K3/445; H05K1/03; H05K1/0313; H05K1/0353; H05K1/036; H05K2201/00; H05K2201/01; H05K2201/0137; H05K2201/015; H05K2201/0183; H05K2201/0187; H05K2201/0195; H05K3/40; H05K3/42; H05K3/425; H05K3/427; H05K3/429; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49124; Y10T29/49126
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
79 words
A laminated circuit board comprising at least one sheet of dielectric material having a dielectric constant of approximately less than 3.0 and containing perforations; a layer containing electrically conductive surfaces and plated through-holes; wherein said dielectric material is encapsulated within a resin and is operatively spaced apart from said electrically conductive surfaces and plated through-holes and wherein perforations in said dielectric material are in registry with plated through-holes of said layer and are greater in diameter than said through-holes.
Claim 2
Dependent Claim
79 words
A laminated circuit board comprising at least one sheet of dielectric material having a dielectric constant of approximately less than 3.0 and containing perforations; a layer containing electrically conductive surfaces and plated through-holes; wherein said dielectric material is encapsulated within a resin and is operatively spaced apart from said electrically conductive surfaces and plated through-holes and wherein perforations in said dielectric material are in registry with plated through-holes of said layer and are greater in diameter than said through-holes.
Claim 3
Dependent Claim
23 words
The laminated circuit board of claim 1, wherein said dielectric material has a dielectric constant in an approximate range from 1.4 to 3.0.
Claim 4
Dependent Claim
13 words
The laminated circuit board of claim 2, wherein said dielectric material comprises polytetrafluoroethylene.
Claim 5
Dependent Claim
19 words
The laminated circuit board of claim 1 having an impedance in a range from approximately 35 to 120 ohms.
Claim 6
Dependent Claim
19 words
The laminated circuit board of claim 1, wherein said sheet of dielectric material is encapsulated in an epoxy resin.
Claim 7
Dependent Claim
20 words
The laminated circuit board of claim 1, wherein said sheet of dielectric material is encapsulated in a glass reinforced resin.
Claim 8
Independent Claim
136 words
A method of fabricating a laminated circuit board utilizing low dielectric materials as a means to improve circuit board performance and achieve improved dimensional control, comprising the steps of: (a) fabricating at least one dielectric layer of said laminated circuit board with dielectric material having a dielectric constant of approximately less than 3.0 and containing perforations; (b) encapsulating said at least one dielectric layer within a resin to provide an encapsulated sheet; (c) providing a layer containing electrically conductive surfaces and plated through-holes on said encapsulated dielectric layer wherein said at least one encapsulated dielectric layer is operatively spaced apart from said electrically conductive surfaces and said plated through-holes by said encapsulating and wherein perforations in said encapsulated material are in registry with plated through-holes of said layer and are greater in diameter than said through-holes.
Claim 9
Independent Claim
136 words
A method of fabricating a laminated circuit board utilizing low dielectric materials as a means to improve circuit board performance and achieve improved dimensional control, comprising the steps of: (a) fabricating at least one dielectric layer of said laminated circuit board with dielectric material having a dielectric constant of approximately less than 3.0 and containing perforations; (b) encapsulating said at least one dielectric layer within a resin to provide an encapsulated sheet; (c) providing a layer containing electrically conductive surfaces and plated through-holes on said encapsulated dielectric layer wherein said at least one encapsulated dielectric layer is operatively spaced apart from said electrically conductive surfaces and said plated through-holes by said encapsulating and wherein perforations in said encapsulated material are in registry with plated through-holes of said layer and are greater in diameter than said through-holes.
Claim 10
Dependent Claim
13 words
The method of claim 7 wherein said layer is an electrically conductive plane.
Claim 11
Dependent Claim
21 words
The method of claim 7, wherein said dielectric material has a dielectric constant in an approximate range rom 1.4 to 3.0.
Claim 12
Dependent Claim
11 words
The method of claim 9, wherein said dielectric material comprises polytetrafluoroethylene.
Claim 13
Independent Claim
124 words
A method of fabricating a laminated circuit board utilizing low dielectric materials as a means to improve circuit board performance and achieve improved dimensional control, comprising the steps of: (a) providing a dielectric sheet of said laminated circuit board with perforations; (b) encapsulating said dielectric sheet within a resin to provide an encapsulated dielectric sheet; (c) laminating the encapsulated dielectric sheet to an electrically conductive plane having through holes, wherein said encapsulated dielectric sheet is operatively spaced apart from said electrically conductive plane and through-holes by said encapsulating and wherein perforations in said encapsulated dielectric sheet are in registry with through-holes of said plane and are greater in diameter than said through-holes; and (d) assembling a laminated circuit board utilizing the encapsulated dielectric laminate.
Claim 14
Independent Claim
124 words
A method of fabricating a laminated circuit board utilizing low dielectric materials as a means to improve circuit board performance and achieve improved dimensional control, comprising the steps of: (a) providing a dielectric sheet of said laminated circuit board with perforations; (b) encapsulating said dielectric sheet within a resin to provide an encapsulated dielectric sheet; (c) laminating the encapsulated dielectric sheet to an electrically conductive plane having through holes, wherein said encapsulated dielectric sheet is operatively spaced apart from said electrically conductive plane and through-holes by said encapsulating and wherein perforations in said encapsulated dielectric sheet are in registry with through-holes of said plane and are greater in diameter than said through-holes; and (d) assembling a laminated circuit board utilizing the encapsulated dielectric laminate.
Claim 15
Dependent Claim
19 words
The method of claim 11, further comprising the steps of: (e) plating said through-holes of said laminated circuit board.
Claim 16
Dependent Claim
21 words
The method of claim 11, wherein said dielectric sheet comprises dielectric material having a dielectric constant of approximately less than 3.0.
Claim 17
Dependent Claim
24 words
The method of claim 13, wherein said dielectric sheet comprises dielectric material having a dielectric constant in an approximate range from 1.4 to 3.0.
Claim 18
Dependent Claim
11 words
The method of claim 14, wherein said dielectric sheet comprises polytetrafluoroethylene.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1992-09-18 | 1993-03-20 | 1993-09-19 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-09-18 | 1997-03-20 | 1997-09-19 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-09-18 | 2001-03-20 | 2001-09-19 | $7700.00 | Window Closed / Lapsed |