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US4864641A Expired / Lapsed US ⏱️ 0.0 years remaining

Radio data transmission system

Assignee: Mitsubishi Electric Corp
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Filing: 1987-12-24
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Granted: 1989-09-05
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Expires: 2007-12-24
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Abstract

Abstract A radio data transmission system wherein signals received via a plurality of diversity antennas are switched at a cycle of subtime slot so that, when the reception level of at least one antenna is sufficiently high to receive the required signal in the relevant time slot, the digital signal in that time slot can be detected properly even if the reception level of any other antenna is not sufficiently high. Accordingly, the code error rate can be minimized by constituting the system in such a manner that the correlation of variations in the reception levels of the diversity antennas becomes extremely low.

Inventors

  • 👤 Nobuhiro Nakamura

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 11:12
CPC Classifications
H; H04; H04B; H04B7/00; H04B7/02; H04B7/04; H04B7/08; H04B7/0802; H04B7/0822; H04L; H04L1/00; H04L1/02; H04L1/06

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 237 words
A receiver system for receiving signals from a radio data transmission system in which baseband signals are phase modulated with digital information in each of a plurality of time slots, converted into radio frequency signals, and transmitted via at least two transmission paths having substantially different transmission lengths, comprising: (a) a plurality n (integer greater than 1) of receiving antennas having a mutually low correlation of reception; (b) an antenna switching circuit for switching a received signal from among each of said receiving antennas at a cycle of 1/n of each time slot and outputting signals from each of the antennas alternately; (c) a receiving circuit for amplifying and demodulating a plurality n of output signals from said antenna switching circuit, and converting said output signals into baseband signals; (d) a delay detection circuit for detecting the phase differential of said baseband signals from said receiving circuit through a delay circuit having a delay time equivalent to one time slot, and detecting the digital signals transmitted by said baseband signals; and (e) a timing signal generator circuit for extracting the digital information of each time slot from the output signal of said delay detection circuit, and controlling the switching action of said antenna switching circuit with 1/n duration of one time slot, wherein the digital data information is detected by introducing the transmitted signals in sequence through said plurality n of antennas during every 1/n time slot.
Claim 2
Dependent Claim 237 words
A receiver system for receiving signals from a radio data transmission system in which baseband signals are phase modulated with digital information in each of a plurality of time slots, converted into radio frequency signals, and transmitted via at least two transmission paths having substantially different transmission lengths, comprising: (a) a plurality n (integer greater than 1) of receiving antennas having a mutually low correlation of reception; (b) an antenna switching circuit for switching a received signal from among each of said receiving antennas at a cycle of 1/n of each time slot and outputting signals from each of the antennas alternately; (c) a receiving circuit for amplifying and demodulating a plurality n of output signals from said antenna switching circuit, and converting said output signals into baseband signals; (d) a delay detection circuit for detecting the phase differential of said baseband signals from said receiving circuit through a delay circuit having a delay time equivalent to one time slot, and detecting the digital signals transmitted by said baseband signals; and (e) a timing signal generator circuit for extracting the digital information of each time slot from the output signal of said delay detection circuit, and controlling the switching action of said antenna switching circuit with 1/n duration of one time slot, wherein the digital data information is detected by introducing the transmitted signals in sequence through said plurality n of antennas during every 1/n time slot.
Claim 3
Independent Claim 160 words
The system as defined in claim I, wherein the number n of antennas is two and said receiver system further comprises: an amplifier for amplifying in common the signals obtained from the two antennas by the switching action; a first switch for switching the output of said amplifier synchronously with said antenna switching circuit and inputting the output signal of the first antenna to a first terminal while inputting the output signal of the second antenna to a second terminal; a first narrow band filter for filtering in a narrow band area the signal fed to said first terminal; a second narrow band filter for filtering in a narrow band area the signal fed to said second terminal; a second switch for switching the outputs of said first and second narrow band filters and supplying said outputs alternately at an output terminal; and a demodulator circuit for demodulating the output of said second switch and thereby demodulating the baseband signal.
Claim 4
Dependent Claim 36 words
The system as defined in claim 2, wherein the switchover timing of said second switch is delayed from that of said first switch corresponding to the delay time of said first and second narrow band filters.
Claim 5
Dependent Claim 235 words
A receiver system for receiving radio frequency signals from a radio data transmission system in which baseband signals are phase modulated with digital information in each of a plurality of time slots from at least two transmission paths having substantially different transmission lengths, comprising: (a) a plurality n (integer greater than 1) of receiving antennas having a mutually low correlation of reception; (b) an antenna switching circuit for switching a received signal from among each of said receiving antennas at a cycle of 1/n of each time slot and outputting signals from each of the antennas alternately; (c) an amplifying and switching circuit for amplifying a plurality n of output signals from the antenna switching circuit and converting the frequencies of the signals into baseband frequencies; (d) a delay detection circuit for detecting the phase differential of output signals of said amplifying and switching circuit through a delay circuit having a delay time equivalent to one time slot, and detecting the digital signals transmitted by said baseband signals; and (e) a timing signal generator circuit for extracting the digital information of each time slot from the output signal of said delay detection circuit, and controlling the switching action of said antenna switching circuit with 1/n duration of one time slot, wherein the digital data information is detected by introducing the transmitted signals in sequence through said plurality n of antennas during every 1/n time slot.
Claim 6
Dependent Claim 235 words
A receiver system for receiving radio frequency signals from a radio data transmission system in which baseband signals are phase modulated with digital information in each of a plurality of time slots from at least two transmission paths having substantially different transmission lengths, comprising: (a) a plurality n (integer greater than 1) of receiving antennas having a mutually low correlation of reception; (b) an antenna switching circuit for switching a received signal from among each of said receiving antennas at a cycle of 1/n of each time slot and outputting signals from each of the antennas alternately; (c) an amplifying and switching circuit for amplifying a plurality n of output signals from the antenna switching circuit and converting the frequencies of the signals into baseband frequencies; (d) a delay detection circuit for detecting the phase differential of output signals of said amplifying and switching circuit through a delay circuit having a delay time equivalent to one time slot, and detecting the digital signals transmitted by said baseband signals; and (e) a timing signal generator circuit for extracting the digital information of each time slot from the output signal of said delay detection circuit, and controlling the switching action of said antenna switching circuit with 1/n duration of one time slot, wherein the digital data information is detected by introducing the transmitted signals in sequence through said plurality n of antennas during every 1/n time slot.
Claim 7
Dependent Claim 159 words
The system as defined in claim 4, wherein the number n of antennas is two and said receiver system further comprises: an amplifier for amplifying in common the signals obtained from two antennas by the switching action; a first switch for switching the output of said amplifier synchronously with said antenna switching circuit and outputting the output signal of the first antenna to a first terminal while outputting the output signal of the second antenna to a second terminal; a first narrow band filter for filtering in a narrow band area the signal fed to said first terminal; a second narrow band filter for filtering in a narrow band area the signal fed to said second terminal; a second switch for switching the outputs of said first and second narrow band filters and supplying said outputs alternately to an output terminal; and a demodulator circuit for demodulating the output of said second switch and thereby demodulating the baseband signals.
Claim 8
Dependent Claim 36 words
The system as defined in claim 5, wherein the switchover timing of said second switch is delayed from that of said first switch corresponding to the delay time of said first and second narrow band filters.
Claim 9
Dependent Claim 36 words
The system as defined in claim 4 wherein a local transmitted frequency of the amplifying and switching circuit is corrected to maintain phases of two signals impressed against the delay detection circuit in a predetermined relationship.

References Cited (Backward Citations)

US4143369A Cited
US4370522A Cited
US4525869A Cited
US4696058A Cited
US4611334A Cited
US4756023A Cited
US4733402A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1992-09-04 1993-03-06 1993-09-05 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1996-09-04 1997-03-06 1997-09-05 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2000-09-04 2001-03-06 2001-09-05 $7700.00 Window Closed / Lapsed

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