US4864570A
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US
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Processing pulse control circuit for use in device performing signature analysis of digital circuits
Assignee: International Business Machines Corp
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Filing: 1987-06-29
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Granted: 1989-09-05
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Expires: 2007-06-29
Abstract
Abstract A processing pulse control circuit for use in treating indeterminate signature increments in an apparatus producing RPT signature analysis of digital circuits. A circuit to control clock pulses to processing devices is provided. The circuit includes a counter to produce a count corresponding to the number of clock pulses received, and also a memory which stores clock count values where indeterminate signature increments will be encountered. A comparator compares the actual clock count values with the stored clock count values to produce a control signal. In response to this control signal, clock pulses are normally allowed to pass to a processing device during clock pulse counts at which determinate signature increments are encountered, but are blocked where indeterminate signature increments are encountered.
Inventors
- 👤 Robert J. Savaglio
- 👤 Peter A. Twombly
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-07 06:48
CPC Classifications
G; G06; G06F; G06F11/00; G06F11/22; G06F11/26; G06F11/273; G06F11/277; G06F11/2273
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
131 words
A processing pulse control circuit for use in treating indeterminate signature increments in an apparatus for producing signature analysis of digital circuits, said processing pulse control circuit comprising: clock source means for providing clock pulses; indicator means for providing, for each clock pulse count, an indication of whether a signature is determinate or indeterminate; processing pulse output means for outputting said clock pulses during clock pulse counts at which a signature is determinate; and processing pulse control means, connected to said clock source means and said processing pulse output means, for normally passing clock pulses from said clock source means to said processing pulse output means during clock pulse counts at which the signature is determinate, and not passing clock pulses during clock pulse counts at which the signature is indeterminate.
Claim 2
Dependent Claim
131 words
A processing pulse control circuit for use in treating indeterminate signature increments in an apparatus for producing signature analysis of digital circuits, said processing pulse control circuit comprising: clock source means for providing clock pulses; indicator means for providing, for each clock pulse count, an indication of whether a signature is determinate or indeterminate; processing pulse output means for outputting said clock pulses during clock pulse counts at which a signature is determinate; and processing pulse control means, connected to said clock source means and said processing pulse output means, for normally passing clock pulses from said clock source means to said processing pulse output means during clock pulse counts at which the signature is determinate, and not passing clock pulses during clock pulse counts at which the signature is indeterminate.
Claim 3
Dependent Claim
195 words
A processing pulse control circuit as claimed in claim 1, wherein said indicator means comprises: memory means for supplying indeterminate count values at which indeterminate signature increment will be encountered; and wherein said processing pulse control means comprises: counter means receiving the clock pulses from said clock source means and producing a count in response thereto; comparator means for producing a control signal in response to a comparison of the count from said counter means with the indeterminate count values from said memory means, said control signal reflecting a determinate state when the comparison does not result in a match, and reflecting an indeterminate state when the comparison does result in a match; and switch means having an input terminal connected to receive the clock pulses from said clock source means, an output terminal which corresponds to said processing pulse output means, and a control terminal receiving the control signal from said comparator means, said switch means for passing the clock pulses from said clock source means to said processing pulse output means when said control signal reflects a determinate state, and not passing the clock pulses when said control signal reflects an indeterminate state.
Claim 4
Dependent Claim
60 words
A processing pulse control circuit as claimed in claim 2, wherein said switch means is an AND gate having a first input terminal connected to receive the clock pulses from said clock source means, a second input terminal connected to receive the control signal from said comparator means, and an output terminal which corresponds to said processing pulse output means.
Claim 5
Dependent Claim
34 words
A processing pulse control circuit as claimed in claim 2, wherein said clock pulses outputted by said processing pulse output means are used as recording pulses to control the recording of the signature increments.
Claim 6
Dependent Claim
29 words
A processing pulse control circuit as claimed in claim 1, wherein said clock source means comprises a terminal receiving system clock pulses from said apparatus for producing signature analysis.
Claim 7
Dependent Claim
176 words
A processing pulse control circuit as claimed in claim 1, wherein said processing pulse control means comprises: counter means receiving the clock pulses from said clock source means and producing a count in response thereto; wherein said indicator means comprises memory means for supplying a control signal reflecting whether a signature pattern increment is in a determinate or indeterminate state, said memory means receiving the count from said counter means as an address input, the addressed memory location outputs corresponding to said control signal; and wherein said processing pulse control means further comprises switch means having an input terminal connected to receive clock pulses from said clock source means, an output terminal which corresponds to said processing pulse output means, and a control terminal receiving the control signal from said memory means, said switch means allowing the clock pulses from said clock source means to appear on the processing pulse output means when said control signal reflects a determinate state, and not allowing the clock pulses to appear when said control signal reflects and indeterminate state.
Claim 8
Independent Claim
88 words
A method for controlling processing pulses for treating indeterminate signature increments in devices which produce signature analysis of digital circuits, said method comprising the steps of: providing a source of clock pulses; and providing, for each clock pulse count, an indication of whether a signature is determinate or indeterminate; allowing said clock pulses to be outputted as processing pulses during clock pulse counts at which the signature is determinate, and not allowing said clock pulses to be outputted during clock pulse counts at which the signature is indeterminate.
Claim 9
Independent Claim
88 words
A method for controlling processing pulses for treating indeterminate signature increments in devices which produce signature analysis of digital circuits, said method comprising the steps of: providing a source of clock pulses; and providing, for each clock pulse count, an indication of whether a signature is determinate or indeterminate; allowing said clock pulses to be outputted as processing pulses during clock pulse counts at which the signature is determinate, and not allowing said clock pulses to be outputted during clock pulse counts at which the signature is indeterminate.
Claim 10
Independent Claim
128 words
An apparatus for producing signature analysis of digital circuits, wherein indeterminate signature increments may be encountered, the improvement comprising: a processing pulse control circuit comprising: clock source means for providing clock pulses; indicator means for providing, for each clock pulse count, an indication of whether a signature is determinate or indeterminate; processing pulse output means for outputting said clock pulses during clock pulse counts at which the signature is determinate; and processing pulse control means, connected to said clock source means and said processing pulse output means, for normally passing clock pulses from said clock source means to said processing pulse output means during clock pulse counts at which the signature is determinate, and not passing clock pulses during clock pulse counts at which the signature is indeterminate.
Claim 11
Independent Claim
128 words
An apparatus for producing signature analysis of digital circuits, wherein indeterminate signature increments may be encountered, the improvement comprising: a processing pulse control circuit comprising: clock source means for providing clock pulses; indicator means for providing, for each clock pulse count, an indication of whether a signature is determinate or indeterminate; processing pulse output means for outputting said clock pulses during clock pulse counts at which the signature is determinate; and processing pulse control means, connected to said clock source means and said processing pulse output means, for normally passing clock pulses from said clock source means to said processing pulse output means during clock pulse counts at which the signature is determinate, and not passing clock pulses during clock pulse counts at which the signature is indeterminate.
Claim 12
Dependent Claim
88 words
In a method for producing signature analysis of digital circuits, wherein indeterminate signature increments may be encountered, an improved method of controlling processing pulses, comprising: providing a source of clock pulses; and providing, for each clock pulse count, an indication of whether a signature is determinate or indeterminate; allowing said clock pulses to be outputted as a processing pulses during clock pulse counts at which the signature is determinate, and not allowing said clock pulses to be outputted during clock pulse counts at which the signature is indeterminate.
Claim 13
Dependent Claim
88 words
In a method for producing signature analysis of digital circuits, wherein indeterminate signature increments may be encountered, an improved method of controlling processing pulses, comprising: providing a source of clock pulses; and providing, for each clock pulse count, an indication of whether a signature is determinate or indeterminate; allowing said clock pulses to be outputted as a processing pulses during clock pulse counts at which the signature is determinate, and not allowing said clock pulses to be outputted during clock pulse counts at which the signature is indeterminate.
Claim 14
Dependent Claim
131 words
A recording pulse control circuit for use in treating indeterminate signature pattern increments in an apparatus producing signature analysis of digital circuits, said recording pulse control circuit comprising: clock source means for providing clock pulses; indicator means for providing, for each clock pulse count, an indication of whether a signature is determinate or indeterminate; recording pulse output means for outputting said clock pulses during clock pulse counts at which the signature is determinate; and processing pulse control means, connected to said clock source means and said recording pulse output means, for normally passing clock pulses from said clock source means to said recording pulse output means during clock pulse counts at which the signature is determinate, and not passing clock pulses during clock pulse counts at which the signature is indeterminate.
Claim 15
Dependent Claim
131 words
A recording pulse control circuit for use in treating indeterminate signature pattern increments in an apparatus producing signature analysis of digital circuits, said recording pulse control circuit comprising: clock source means for providing clock pulses; indicator means for providing, for each clock pulse count, an indication of whether a signature is determinate or indeterminate; recording pulse output means for outputting said clock pulses during clock pulse counts at which the signature is determinate; and processing pulse control means, connected to said clock source means and said recording pulse output means, for normally passing clock pulses from said clock source means to said recording pulse output means during clock pulse counts at which the signature is determinate, and not passing clock pulses during clock pulse counts at which the signature is indeterminate.
Claim 16
Independent Claim
88 words
A method to control recording pulses for treating indeterminate signature increments in devices which produce signature analysis of digital circuits, said method comprising the steps of: providing a source of clock pulses; and providing, for each clock pulse count, an indication of whether a signature is determinate or indeterminate; allowing said clock pulses to be outputted as recording pulses during clock pulse counts at which the signature is determinate, and not allowing said clock pulses to be output during clock pulse counts at which the signature is indeterminate.
Claim 17
Independent Claim
88 words
A method to control recording pulses for treating indeterminate signature increments in devices which produce signature analysis of digital circuits, said method comprising the steps of: providing a source of clock pulses; and providing, for each clock pulse count, an indication of whether a signature is determinate or indeterminate; allowing said clock pulses to be outputted as recording pulses during clock pulse counts at which the signature is determinate, and not allowing said clock pulses to be output during clock pulse counts at which the signature is indeterminate.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1992-09-04 | 1993-03-06 | 1993-09-05 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-09-04 | 1997-03-06 | 1997-09-05 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-09-04 | 2001-03-06 | 2001-09-05 | $7700.00 | Window Closed / Lapsed |