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US4864526A Expired / Lapsed US ⏱️ 0.0 years remaining

Interpolator/decimator filter structure and a digital filter therefor

Assignee: Plessey Semiconductors Ltd
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Filing: 1986-08-08
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Granted: 1989-09-05
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Expires: 2006-08-08
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Abstract

Abstract An interpolator or decimator filter structure operable between two sampling rates (Fs and 2F2), and in which two branches (21 and 23) of the structure are divided into low and high frequency sections by sampling switches (27 and 29). The high frequency section of one branch (21) incorporates a composite filter comprises of a nesting filter (1') and a nested filter 1. Each of these filters 1, 1' includes a digital coefficient multiplier (5,5'). The coefficient (K2) of the coefficient multiplier (5), part of the nested filter (1), is preset to a value such that 3 dB attenuation occurs at a point offset in frequency from one-half the lower sampling rate (Fs).

Inventors

  • 👤 Nigel P. Dyer

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 18:42
CPC Classifications
H; H03; H03H; H03H17/00; H03H17/02; H03H17/04; H03H17/0248; H03H17/0264; H03H17/0273; H03H17/0277; H03H17/0279; H03H17/0416; H03H17/0427; H03H17/0438; H03H17/0444; H03H17/045; H03H2017/0472

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 123 words
A filter structure for interpolating or decimating between two sampling rates, said structure comprising first and second signal processing branches, each of said signal processing branches comprises a low frequency section and a high frequency section, a respective sampling switch in each of said branches, said sampling switches serving to divide said branches between said low frequency and said high frequency sections, a nested all-pass-network recursive digital filter included in said high frequency section of said first branch, said recursive digital filter comprising a first recursive filter including a first coefficient multiplier and a second recursive filter including a second coefficient multiplier, said second recursive filter being nested within said first recursive filter and said second coefficient multiplier having a predetermined coefficient value.
Claim 2
Dependent Claim 123 words
A filter structure for interpolating or decimating between two sampling rates, said structure comprising first and second signal processing branches, each of said signal processing branches comprises a low frequency section and a high frequency section, a respective sampling switch in each of said branches, said sampling switches serving to divide said branches between said low frequency and said high frequency sections, a nested all-pass-network recursive digital filter included in said high frequency section of said first branch, said recursive digital filter comprising a first recursive filter including a first coefficient multiplier and a second recursive filter including a second coefficient multiplier, said second recursive filter being nested within said first recursive filter and said second coefficient multiplier having a predetermined coefficient value.
Claim 3
Dependent Claim 125 words
A recursive digital filter, for use in an interpolator or decimator filter structure, wherein the digital filter is characterised by a transform function of the form given by the expression: ##EQU5## in which expression the term A(Z) is a transform function of the form given by the expression: ##EQU6## and in which the terms K 1 and K 2 are first and second non-zero multiplier coefficients, and the term Z -1 is the unit delay transform operator, the filter being of nested structure comprised of a first filter including a first coefficient multiplier for multiplication by the first coefficient K 1 ; and, nested within this first filter, a second filter including a second coefficient multiplier for multiplication by the second coefficient K 2 .
Claim 4
Dependent Claim 125 words
A recursive digital filter, for use in an interpolator or decimator filter structure, wherein the digital filter is characterised by a transform function of the form given by the expression: ##EQU5## in which expression the term A(Z) is a transform function of the form given by the expression: ##EQU6## and in which the terms K 1 and K 2 are first and second non-zero multiplier coefficients, and the term Z -1 is the unit delay transform operator, the filter being of nested structure comprised of a first filter including a first coefficient multiplier for multiplication by the first coefficient K 1 ; and, nested within this first filter, a second filter including a second coefficient multiplier for multiplication by the second coefficient K 2 .
Claim 5
Dependent Claim 78 words
A recursive digital filter, as claimed in claim 2, wherein the first filter, the second filter, or both, comprise: a common input terminal; a unit delay element connected to the terminal via a substrative node; a coefficient multiplier connected to the terminal via a first summing node; a second summing node connected in parallel to the outputs of the delay element and the multiplier; and, cross-couplings from these outputs to the subtractive node and first summing node, respectively.

References Cited (Backward Citations)

US3855423A Cited
US4270026A Cited
US4270027A Cited
US4302631A Cited
US4649507A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1992-09-04 1993-03-06 1993-09-05 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1996-09-04 1997-03-06 1997-09-05 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2000-09-04 2001-03-06 2001-09-05 $7700.00 Window Closed / Lapsed

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