Sample-and-hold phase detector for use in a phase locked loop

Claim 2

A sample-and-hold phase detector, comprising: means for receiving a reference signal having a predetermined period: means for receiving an input signal at any time within a sampling window consisting of approximately two consecutive periods of said reference signal; means for sampling a ramp waveform to provide a linear output signal proportional to the difference between said input signal and an approximate center of said sampling window.

Claim 3

The sample-and-hold phase detector, of claim 1, wherein said sampling window comprises a moving window having a duration of approximately two consecutive periods of said reference signal, said sampling window occurring for every consecutive period of said reference signal.

Claim 4

The sample-and-hold phase detector, of claim 1, which includes means for filtering said linear output signal to provide a control signal.

Claim 5

A sample-and-hold phase detector comprising: means for receiving a reference signal having a predetermined period; means for providing a sampling window comprising approximately two consecutive periods of said reference signal, said sampling window having at least an approximate center; means for receiving an input signal at any time during said sampling window; means for sampling a ramp waveform to provide a linear output signal proportional to the difference between said input signal and said approximate center of said sampling window.

Claim 6

A sample-and-hold phase detector comprising: means for receiving a reference signal having a predetermined period; means for providing a sampling window comprising approximately two consecutive periods of said reference signal, said sampling window having at least an approximate center; means for receiving an input signal at any time during said sampling window; means for sampling a ramp waveform to provide a linear output signal proportional to the difference between said input signal and said approximate center of said sampling window.

Claim 9

The method of claim 5, which includes the step of: providing said control signal to a voltage controlled oscillator.

Claim 10

The method of claim 6, which includes the step of filtering said control signal prior to providing said control signal to said voltage controlled oscillator.

Claim 11

A sample-and-hold phase detector, comprising: means for receiving an input signal; means for receiving a reference signal having a predetermined period; means for comparing said input signal, and said reference signal, and for sampling a ramp waveform to generate a control signal proportional to a phase difference between said input signal and said reference signal, said control signal being linear over substantially two consecutive periods of said reference signal.

Claim 12

A sample-and-hold phase detector, comprising: means for receiving an input signal; means for receiving a reference signal having a predetermined period; means for comparing said input signal, and said reference signal, and for sampling a ramp waveform to generate a control signal proportional to a phase difference between said input signal and said reference signal, said control signal being linear over substantially two consecutive periods of said reference signal.

Claim 13

The sample-and-hold phase detector of claim 8, which includes means for coupling said control signal to a voltage controlled oscillator.

Claim 14

The sample-and-hold phase detector of claim 9, which includes filter means for filtering said control signal prior to providing said control signal to said volage controlled oscillator.

Claim 15

The sample-and-hold phase detector of claim 10, wherein said filter means comprises a low pass filter.

Claim 16

A sample-and-hold phase detector, comprising: means for receiving a reference signal having a predetermined period; means for receiving an input signal at any time during two consecutive periods of said reference signal; means for initiating a positive going linear ramp waveform whenever said reference signal leads said input signal by less than 360 degrees; means for initiating a negative going linear ramp waveform whenever said input signal leads said reference signal by less than 360 degrees; means for sampling said positive or negative going ramp waveforms at the beginning of the next period of said input signal to provide a sampled ramp signal; means for providing an output signal proportional to said sampled ramp signal.

Claim 17

A sample-and-hold phase detector, comprising: means for receiving a reference signal having a predetermined period; means for receiving an input signal at any time during two consecutive periods of said reference signal; means for initiating a positive going linear ramp waveform whenever said reference signal leads said input signal by less than 360 degrees; means for initiating a negative going linear ramp waveform whenever said input signal leads said reference signal by less than 360 degrees; means for sampling said positive or negative going ramp waveforms at the beginning of the next period of said input signal to provide a sampled ramp signal; means for providing an output signal proportional to said sampled ramp signal.

Claim 18

The sample-and-hold phase detector of claim 12, which includes means for filtering said output signal.

Claim 19

The sample-and-hold phase detector of claim 13, wherein said filtering means comprises a low pass filter.

Claim 20

A phase locked loop capable of linear operation over a 4π radians phase range of a reference signal, comprising: voltage controlled oscillator means for providing an output signal in response to a control signal; said reference signal having a predetermined period; and, phase detector means, comprising: (i) means for receiving said reference signal; (ii) means for receiving an input signal at any time within a sampling window comprising approximately two consecutive periods of said reference signal; and (iii) means for sampling a ramp waveform to provide said control signal, such that said control signal is linear over said sampling window, and proportional to the difference between said input signal and an approximate center of said sampling window.

Claim 21

A phase locked loop capable of linear operation over a 4π radians phase range of a reference signal, comprising: voltage controlled oscillator means for providing an output signal in response to a control signal; said reference signal having a predetermined period; and, phase detector means, comprising: (i) means for receiving said reference signal; (ii) means for receiving an input signal at any time within a sampling window comprising approximately two consecutive periods of said reference signal; and (iii) means for sampling a ramp waveform to provide said control signal, such that said control signal is linear over said sampling window, and proportional to the difference between said input signal and an approximate center of said sampling window.

Claim 22

The phase locked loop of claim 15, which includes means for dividing said input signal to provide a divided input signal to said phase detector.

Claim 23

The phase locked loop of claim 15, which includes means for filtering said control signal to provide a filtered control signal to said voltage controlled oscillator means.