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US4864168A Expired / Lapsed US ⏱️ 0.0 years remaining

Process for controlling an optical pnpn thyristor to be driven

Assignee: NEC Corp
•
Filing: 1988-07-25
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Granted: 1989-09-05
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Expires: 2008-07-25
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Abstract

Abstract A process for controlling an optical pnpn thyristor to be driven comprises a step of applying a train of pulses to maintain a low impedance state of an optical pnpn thyristor which is shifted beforehand to be in the low impedance state by a positive set pulse. Each of the train of pulses is less than in its level than the positive set pulse. When light emission is required for the reading of an information, a positive set pulse is applied to the optical pnpn thyristor. As a result, electric power consumption is reduced during a time storing the information.

Inventors

  • 👤 Kenichi Kasahara
  • 👤 Yoshiharu Tashiro

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-01 19:59
CPC Classifications
H; H10; H10H; H10H20/00; H10H20/80; H10H20/81; H10H20/813; G; G11; G11C; G11C11/00; G11C11/21; G11C11/34; G11C11/39; G11C7/00; G11C7/005; H10F; H10F55/00; H10F55/18

Claims Analysis

Total Claims: 3
Claim 1
Independent Claim 144 words
A process for controlling an optical pnpn thyristor to be driven comprising steps of, shifting an optical pnpn thyristor from a high impedance state to a low impedance state to provide light emission by applying a first positive set pulse across anode and cathode thereof, said optical pnpn thyristor including an anode region of p-semiconductor, a cathode region of n-semiconductor, and a plurality of semiconductor layers sandwiched between said anode and cathode regions, applying a train of pulses across said anode and cathode intermittently, each of said pulses being less in its level than said first positive set pulse so that said low impedance state of said optical pnpn thyristor is held without light emission, and applying a second positive set pulse across said anode and cathode of said optical pnpn thyristor which is held in said low impedance state to provide light emission.
Claim 2
Dependent Claim 144 words
A process for controlling an optical pnpn thyristor to be driven comprising steps of, shifting an optical pnpn thyristor from a high impedance state to a low impedance state to provide light emission by applying a first positive set pulse across anode and cathode thereof, said optical pnpn thyristor including an anode region of p-semiconductor, a cathode region of n-semiconductor, and a plurality of semiconductor layers sandwiched between said anode and cathode regions, applying a train of pulses across said anode and cathode intermittently, each of said pulses being less in its level than said first positive set pulse so that said low impedance state of said optical pnpn thyristor is held without light emission, and applying a second positive set pulse across said anode and cathode of said optical pnpn thyristor which is held in said low impedance state to provide light emission.
Claim 3
Dependent Claim 64 words
A process for controlling an optical pnpn thyristor to be driven according to claim 1 further comprising a step of, applying a positive bias voltage less in its level than said train of pulses across said anode and cathode of said optical pnpn thyristor constantly, said optical pnpn thyristor being shifted to be in said low impedance state by said first positive set pulse.

References Cited (Backward Citations)

US3852798A Cited
US3852797A Cited
US3979587A Cited
US4806997A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1992-09-04 1993-03-06 1993-09-05 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1996-09-04 1997-03-06 1997-09-05 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2000-09-04 2001-03-06 2001-09-05 $7700.00 Window Closed / Lapsed

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