← Back to Patent Explorer
US4862461A Expired / Lapsed US ⏱️ 0.0 years remaining

Packet switch network protocol

Assignee: International Business Machines Corp
•
Filing: 1987-01-12
•
Granted: 1989-08-29
•
Expires: 2007-01-12
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A first of a plurality of nodes in a multiprocessor system transmits a data packet to a second of the plurality of nodes over a data channel when the first node detects a predetermined sequence of bits on a control channel connected therebetween. The data packet is preceded on the data channel by a header which includes a plurality of fields informing the second node of the beginning of the data packet, the length of the data packet and the sequence number assigned to the packet. The data packet is followed by a field which enables the second node to determine whether the data packet was received correctly. If the second node determines that the data packet was received correctly, the data packet is stored in the node and an acknowledgment sequence is transmitted to the first node over the control channel. However, if an error occurs during the transmission of the data packet, the protocol enters an error state by removing all signal information from the data and control channels. Thereafter, a recovery processor, which is associated with each of the plurality of nodes, analyzes the state of the nodes at the time of the error in order to determine which corrective action needed to recover the respective node. The data link protocol also facilitates the transmission of a data packet from a first node through an intermediate node to a final node without storing the data packet in the intermediate node.

Inventors

  • 👤 Bartholomew Blaner

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-26 19:25
CPC Classifications
H; H04; H04L; H04L12/00; H04L12/54; H04L12/56; H04L9/00; H04L9/40; H04L69/00; H04L69/30; H04L69/32; H04L69/322; H04L69/324

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 245 words
A method for transmitting a data packet in an asynchronous digital network system having a plurality of nodes, comprising: (a) transmitting a packet of data from a transmitter of a first node to a receiver of a second node over a first data channel, and initiating a time delay at said first node; (b) analyzing said data packet for errors at said second node; (c) transmitting from said second node to said first node over a second data channel an ACK signal when said packet is determined to have no errors, and a NACK signal when said packet is determined to have errors; (i) storing each error free packet received at said second node in a FIFO buffer; (ii) detecting whether said FIFO buffer is full; (iii) signalling said first node when said FIFO is full; (iv) initiating a second time delay at said first node when said FIFO buffer is full; and, (v) asserting a signal on said second channel indicating to said first node that said second node is available to receive traffic if said FIFO buffer is not full before said second time delay expires; (d) initiating a retransmission of said packet of data from said first node transmitter to said second node if said ACK signal has not been determined to be present during said first time delay; and, (e) transmitting said packet from said second node to a further node when said packet has been received by said second node.
Claim 2
Independent Claim 245 words
A method for transmitting a data packet in an asynchronous digital network system having a plurality of nodes, comprising: (a) transmitting a packet of data from a transmitter of a first node to a receiver of a second node over a first data channel, and initiating a time delay at said first node; (b) analyzing said data packet for errors at said second node; (c) transmitting from said second node to said first node over a second data channel an ACK signal when said packet is determined to have no errors, and a NACK signal when said packet is determined to have errors; (i) storing each error free packet received at said second node in a FIFO buffer; (ii) detecting whether said FIFO buffer is full; (iii) signalling said first node when said FIFO is full; (iv) initiating a second time delay at said first node when said FIFO buffer is full; and, (v) asserting a signal on said second channel indicating to said first node that said second node is available to receive traffic if said FIFO buffer is not full before said second time delay expires; (d) initiating a retransmission of said packet of data from said first node transmitter to said second node if said ACK signal has not been determined to be present during said first time delay; and, (e) transmitting said packet from said second node to a further node when said packet has been received by said second node.
Claim 3
Dependent Claim 30 words
The method of claim 1 further comprising the step of flushing the contents of said FIFO buffer if an error is determined in a packet received by said second node.
Claim 4
Dependent Claim 34 words
The method of claim 1 further comprising the steps of retransmitting said packet to a subsequent node without storing said packet in said FIFO buffer when said packet is destined for said subsequent node.

References Cited (Backward Citations)

US3534330A Cited
US3754211A Cited
US3956589A Cited
US4074232A Cited
US4092630A Cited
US4149142A Cited
US4304001A Cited
US4422171A Cited
US4332027A Cited
US4586086A Cited
US4745593A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1992-08-28 1993-02-27 1993-08-29 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1996-08-28 1997-02-27 1997-08-29 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2000-08-28 2001-02-27 2001-08-29 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag