US4862170A
Expired / Lapsed
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Digital-analog converter
Assignee: Toraichi Kazuo
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Filing: 1988-03-22
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Granted: 1989-08-29
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Expires: 2008-03-22
Abstract
Abstract A digital analog converter which is especially suitable for use in converting a digital audio signal into an analog audio signal includes a unit pulse response signal generator for successively generating unit pulse response signals at a predetermined time interval, a digital data generator for generating digital data at the predetermined time interval, a multiplier for multiplying a unit pulse response signal generated at a certain time by a predetermined item of the digital data, and a mixer for producing an analog signal output by combining the unit pulse response signals that have been multiplied by the digital data.
Inventors
- 👤 Youichi Hashimoto
- 👤 Takashi Tokuyama
- 👤 Kazuya Nishiga
- 👤 Yoshihiro Arai
- 👤 Nobuhide Ueki
- 👤 Naoki Adachi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 17:57
CPC Classifications
H; H03; H03M; H03M1/00; H03M1/10; H03M1/1066
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
81 words
A digital-to-analog converter comprising: a unit pulse response signal generator for successively generating unit pulse response signals at a predetermined time interval; a digital data generator for generating digital data at said predetermined time interval; a multiplier for multiplying a unit pulse response signal generated at a certain time by a predetermined item of said digital data; and a mixer for producing an analog signal output by combining the unit pulse response signals that have been multiplied by said digital data.
Claim 2
Dependent Claim
81 words
A digital-to-analog converter comprising: a unit pulse response signal generator for successively generating unit pulse response signals at a predetermined time interval; a digital data generator for generating digital data at said predetermined time interval; a multiplier for multiplying a unit pulse response signal generated at a certain time by a predetermined item of said digital data; and a mixer for producing an analog signal output by combining the unit pulse response signals that have been multiplied by said digital data.
Claim 3
Dependent Claim
47 words
The digital-to-analog converter according to claim 1, wherein said multiplier outputs V k SP k , where SP k represents a unit pulse response signal generated at the predetermined time interval, and V k represents an item of the digital data generated at the predetermined time interval.
Claim 4
Dependent Claim
132 words
The digital-to-analog converter according to claim 1, wherein when a unit pulse response signal waveform is divided at said predetermined time interval, said unit pulse response signal generator includes n partial waveform generators (where n is a positive integer) for generating respective ones of partial waveform signals obtained by the division at said time interval; said digital data generator includes shift registers for storing, while successively shifting, n items of latest digital data generated at the predetermined time interval; said multiplier includes of n multiplier circuits for multiplying the partial waveform signal generated by each partial waveform generator by a predetermined digital value stored in one of the shift registers corresponding to said partial waveform signal; and said mixer produces the analog signal output by combining signals outputted by said multiplier circuits.
Claim 5
Dependent Claim
101 words
The digital-to-analog converter according to claim 3, wherein each multiplier circuit in said multiplier outputs V k S k , where S k , S k-1 , . . , S 1 , S 0 , S 1 , . . . , S -k successively represent the partial waveform signals obtained when the unit pulse response signal waveform is divided at the predetermined time interval, and V -k , V - (k-1), . . , V -1 , V 0 , V l , . . . , V k represent the digital data in order from oldest to newest.
Claim 6
Dependent Claim
9 words
The digital-to-analog converter according to claim 4, wherein k=4.
Claim 7
Dependent Claim
75 words
The digital-to-analog converter according to claim 3, wherein each of said partial waveform generators comprises: an address counter for counting frequency pulses having a period which is 1/a of said predetermined time interval (where a is a positive integer); a ROM for storing the partial waveform signals discretely in a of storage areas designated by said address counter; and a converter for converting, into an analog signal, digital signals successively read out of said ROM.
Claim 8
Dependent Claim
60 words
The digital-to-analog converter according to claim 6, wherein each of said partial waveform generators generates a partial waveform signal discretely at a second time interval shorter than said predetermined time interval, each of said multiplier circuits executes said multiplication at said second time interval, and said mixer produces the analog signal output by combining the outputs of said multiplier circuits.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1992-08-28 | 1993-02-27 | 1993-08-29 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-08-28 | 1997-02-27 | 1997-08-29 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-08-28 | 2001-02-27 | 2001-08-29 | $7700.00 | Window Closed / Lapsed |