US4853647A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Current gain compensation arrangement
Assignee: RCA Licensing Corp
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Filing: 1988-05-02
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Granted: 1989-08-01
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Expires: 2008-05-02
Abstract
Abstract A first pair of transistors, Q721 and Q723, operating, each, as an emitter follower, has a relatively low emitter current. The emitter followers drive corresponding base electrodes of transistors of a second pair of transistors, Q148 and Q149, coupled as a differential amplifier. A current gain compensating transistor Q726 has a current gain that tracks current gain variations of each of the transistors of the second pair. A base electrode current of the compensating transistor and a second current i Q727 that is unaffected by current gain variations are summed. The summed current is coupled via transistors Q722 and Q724 of a current mirror arrangement to first and second junction terminals, 610e and 610f. The junction terminals are coupled between the respective emitter electrodes of the emitter followers and the base electrodes of the second pair. Currents generated by the current mirror arrangement compensate for variations in the base currents in the transistors of the second pair so as to maintain the emitter currents in the emitter followers substantially unaffected by these variations.
Inventors
- 👤 Michael L. Low
- 👤 Jack Craft
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 18:43
CPC Classifications
G; G05; G05F; G05F3/00; G05F3/02; G05F3/08; G05F3/10; G05F3/16; G05F3/20; G05F3/22; G05F3/222; G05F3/225; H; H03; H03F; H03F3/00; H03F3/45; H03F3/45071; H03F3/45479
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
285 words
An amplifier, comprising: first and second transistors that are coupled to form a differential amplifier; an input stage coupled at a first junction terminal to a control electrode of said second transistor for establishing a voltage level at said control electrode of said second transistor in accordance with a voltage that is developed at an input terminal of said input stage such that an output current flowing in said input stage is coupled to said first junction terminal; a source of a first current; a third transistor having a current gain characteristic that is representative of a current gain characteristic of said second transistor for generating a control electrode current of said third transistor that is combined with said first current to produce a combined second current, said second current having a first portion derived from said first current and a second portion derived from said control electrode current of said third transistor; and a current mirror arrangement responsive to said second current for generating in said current mirror arrangement a third current that is coupled to said first junction terminal, said third current having a first portion derived from said first current of generating said output current of said input stage and a second portion derived from said control electrode current of said third transistor for generating a control electrode current of said second transistor, wherein a deviation of said current gain characteristic of said second transistor from a nominal value thereof that produces a corresponding deviation in said control electrode current of said second transistor is compensated by said control electrode current of said third transistor so as to substantially prevent such current deviation from affecting said output current of said input stage.
Claim 2
Dependent Claim
285 words
An amplifier, comprising: first and second transistors that are coupled to form a differential amplifier; an input stage coupled at a first junction terminal to a control electrode of said second transistor for establishing a voltage level at said control electrode of said second transistor in accordance with a voltage that is developed at an input terminal of said input stage such that an output current flowing in said input stage is coupled to said first junction terminal; a source of a first current; a third transistor having a current gain characteristic that is representative of a current gain characteristic of said second transistor for generating a control electrode current of said third transistor that is combined with said first current to produce a combined second current, said second current having a first portion derived from said first current and a second portion derived from said control electrode current of said third transistor; and a current mirror arrangement responsive to said second current for generating in said current mirror arrangement a third current that is coupled to said first junction terminal, said third current having a first portion derived from said first current of generating said output current of said input stage and a second portion derived from said control electrode current of said third transistor for generating a control electrode current of said second transistor, wherein a deviation of said current gain characteristic of said second transistor from a nominal value thereof that produces a corresponding deviation in said control electrode current of said second transistor is compensated by said control electrode current of said third transistor so as to substantially prevent such current deviation from affecting said output current of said input stage.
Claim 3
Dependent Claim
36 words
An amplifier according to claim 1 wherein said input stage comprises a fourth transistor coupled as an emitter follower and said output current of said input stage flows in an emitter electrode of said fourth transistor.
Claim 4
Dependent Claim
40 words
An amplifier according to claim 1 wherein said first current generating means generates said first current having a value that is independent of said variation in said current gain characteristic of at least one of said second and third transistors.
Claim 5
Dependent Claim
36 words
An amplifier according to claim 1 wherein said current mirror arrangement prevents said deviation in said current gain characteristic of said second transistor from affecting an offset voltage at said input terminal of said input stage.
Claim 6
Dependent Claim
52 words
An amplifier according to claim 1 further comprising, second means coupled to a second junction terminal between corresponding main current conducting electrodes of said first and second transistors for generating a current that varies in the same sense as said first current independently of said current gain characteristic of said second transistor.
Claim 7
Dependent Claim
20 words
An amplifier according to claim 1 wherein said first, second and third transistors are bipolar transistors of the same type.
Claim 8
Dependent Claim
51 words
An amplifier according to claim 1 wherein said current mirror arrangement includes a fourth transistor that generates said third current, said third current flowing in the same direction as said first current and being equal to the sum of said first current and said control electrode current of said third transistor.
Claim 9
Dependent Claim
28 words
An amplifier according to claim 1 wherein said third transistor is coupled outside a signal path formed between an input terminal and an output terminal of said amplifier.
Claim 10
Dependent Claim
56 words
An amplifier according to claim 1 further comprising means for generating a temperature compensated control voltage that is coupled to a control electrode of a bipolar, fourth transistor for generating said first current at a collector electrode of said fourth transistor that is unaffected by a variation of a current gain characteristic of said fourth transistor.
Claim 11
Dependent Claim
45 words
An amplifier according to claim 9 wherein said current mirror arrangement further comprises a fifth transistor coupled in a diode configuration for conducting therethrough a current that is equal to a sum of said first current and said control electrode current of said third transistor.
Claim 12
Dependent Claim
41 words
An amplifier according to claim 10 wherein said current mirror arrangement includes a sixth transistor having a base electrode that is coupled to said fifth transistor and a collector electrode that is coupled to said control electrode of said second transistor.
Claim 13
Dependent Claim
37 words
An amplifier according to claim 11 further comprising a seventh transistor having a base electrode that is coupled to said fifth transistor and a collector electrode that is coupled to a base electrode of said first transistor.
Claim 14
Dependent Claim
22 words
An amplifier according to claim 1 wherein said amplifier forms an error amplifier in a regulator of a television apparatus power supply.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1992-07-31 | 1993-01-30 | 1993-08-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-07-31 | 1997-01-30 | 1997-08-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-07-31 | 2001-01-30 | 2001-08-01 | $7700.00 | Window Closed / Lapsed |