US4852121A
Expired / Lapsed
US
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Coherent pseudonoise code tracking loop
Assignee: Unisys Corp
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Filing: 1987-10-16
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Granted: 1989-07-25
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Expires: 2007-10-16
Abstract
Abstract A coherent pseudonoise code (PN) tracking loop is provided with apparatus for sensing the absence of PN transition in the incoming data stream to the tracking loop and for switching OFF the data stream to prevent phase error distortion and inherent noise from entering the tracking loop which could be sensed as false or incorrect phase error signals. The apparatus includes a transition switch in the incoming data stream that is responsive to transition gate control logic coupled to the output of the PN replica generator in the tracking loop for switching OFF the incoming data stream when no PN transitions are occurring.
Inventors
- 👤 Samuel C. Kingston
- 👤 John W. Zscheile, Jr.
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 22:56
CPC Classifications
H; H04; H04B; H04B1/00; H04B1/69; H04B1/707; H04B1/7073; H04B1/7085
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
155 words
A coherent pseudonoise (PN) code tracking loop of the type having means for detecting the phase error between the incoming PN signal and a PN replica generator driven by the output of a voltage controlled oscillator, the improvement comprising: an isolation mixer, coupled to the source of incoming PN signals, a PN replica generator coupled to said voltage controlled oscillator, exclusive OR gating means coupled to the output of said PN replica generator for providing a modified PN generator signal coupled to said isolation mixer, transition gating means coupled to the output of said an isolation mixer, delay means operable to delay the signal output of said an isolation mixer to said transition gating means, and transition gate control means having its output coupled to said transition gating means to switch OFF said incoming PN signals from the output of said an isolation mixer when no data transitions are occurring in said incoming PN signals.
Claim 2
Dependent Claim
155 words
A coherent pseudonoise (PN) code tracking loop of the type having means for detecting the phase error between the incoming PN signal and a PN replica generator driven by the output of a voltage controlled oscillator, the improvement comprising: an isolation mixer, coupled to the source of incoming PN signals, a PN replica generator coupled to said voltage controlled oscillator, exclusive OR gating means coupled to the output of said PN replica generator for providing a modified PN generator signal coupled to said isolation mixer, transition gating means coupled to the output of said an isolation mixer, delay means operable to delay the signal output of said an isolation mixer to said transition gating means, and transition gate control means having its output coupled to said transition gating means to switch OFF said incoming PN signals from the output of said an isolation mixer when no data transitions are occurring in said incoming PN signals.
Claim 3
Dependent Claim
29 words
A coherent PN tracking loop as set forth in claim 1 wherein said exclusive OR gating means is coupled to a flip-flop which provides said modified PN generator signal.
Claim 4
Dependent Claim
38 words
A coherent PN tracking loop as set forth in claim 2 wherein said transition gate control means comprises a second flip-flop coupled to a second exclusive OR gate which provides said output coupled to said transition gating means.
Claim 5
Dependent Claim
23 words
A coherent PN tracking loop as set forth in claim 3 wherein said modified PN generator signal is coupled to said second flip-flop.
Claim 6
Dependent Claim
35 words
A coherent PN tracking loop as set forth in claim 4 which further includes a divide by two circuit coupled to said voltage controlled oscillator and further being coupled to said exclusive OR gating means.
Claim 7
Dependent Claim
40 words
A coherent PN tracking loop as set forth in claim 5 which further included a second mixer coupled between said delay mean and said transition gating means and further being coupled to the output of said divide by two circuits.
Claim 8
Dependent Claim
27 words
A coherent PN tracking loop as set forth in claim 6 wherein said delay means provides one-half of one clock time delay of said incoming PN signals.
Claim 9
Dependent Claim
73 words
A coherent PN tracking loop as set forth in claim 1 which further includes a normally closed track acquisition switch connected to said phase error signal in said tracking loop, said track acquisition switch being adapted to be moved to an open position to connect the output of a phase detector to the input of said voltage controlled oscillator and the output of said voltage controlled oscillator being connected to said phase detector.
Claim 10
Dependent Claim
45 words
A coherent PN tracking loop as set forth in claim 8 which further includes a compensated PN clock generator having its output coupled to said phase detector for driving the frequency of said voltage controlled oscillator to the frequency of said compensated PN clock generator.
Claim 11
Independent Claim
67 words
A method of eliminating distorted phase error signals and noise in a coherent PN tracking loop in the absence of data signals, the steps comprising: apply incoming data signals to said tracking loop, sensing the absence of PN transition signals in said incoming data signal to said tracking loop, and switching OFF said incoming data signals to said tracking loop in the absence of PN transition signals.
Claim 12
Independent Claim
67 words
A method of eliminating distorted phase error signals and noise in a coherent PN tracking loop in the absence of data signals, the steps comprising: apply incoming data signals to said tracking loop, sensing the absence of PN transition signals in said incoming data signal to said tracking loop, and switching OFF said incoming data signals to said tracking loop in the absence of PN transition signals.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1992-07-24 | 1993-01-23 | 1993-07-25 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-07-24 | 1997-01-23 | 1997-07-25 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-07-24 | 2001-01-23 | 2001-07-25 | $7700.00 | Window Closed / Lapsed |