Analog signal synthesizing processing circuit with periodic noise compensation

Claim 2

An analog signal synthesizing processing circuit with a periodic noise compensation, said circuit comprising: synthesizing means for synthesizing a plurality of audio signals supplied from a reproduction device for reproducing a plurality of analog signals containing noise being generated almost periodically; phase synchronizing means for synchronizing a synthesizing operation of said synthesizing means with a given sampling clock signal; analog-digital converting means for converting an analog signal output from said synthesizing means into a digital signal in response to said sampling clock signal supplied to said phase synchronizing means; signal output approximating means for approximating said noise contained in said converted signal obtained by said analog-digital converting means with reference to both preceding and following signals in response to said sampling clock signal; and digital-analog converting means for converting said approximated signal output from said signal output approximating means into an analog signal.

Claim 3

An analog signal synthesizing processing circuit with a periodic noise compensation, said circuit comprising: signal oscillating means for generating a plurality of analog signals containing noise being generated almost periodically, said signal oscillating means having at least two heads which slide on a magnetic tape to trace a track on the magnetic tape; synthesizing means for synthesizing a plurality of analog signals containing said noise generated by said signal oscillating means, said synthesizing means including a switch for switching said heads; phase synchronizing means for synchronizing a synthesizing operation of said synthesizing means with a given sampling clock signal; analog-digital converting means for converting an analog signal output from said synthesizing means into a digital signal in response to said sampling clock signal supplied to said phase synchronizing means; signal output approximating means for approximating said noise contained in said converted signal obtained by said analog-digital converting means with reference to both preceding and following signals, said signal output approximating means comprising a compensation processing circuit; and digital-analog converting means for converting said approximated signal output from said signal output approximating means into analog signal.

Claim 4

An analog signal synthesizing processing circuit with a periodic noise compensation, said circuit comprising: signal oscillating means for generating a plurality of analog signals containing noise being generated almost periodically, said signal oscillating means having at least two heads which slide on a magnetic tape to trace a track on the magnetic tape; synthesizing means for synthesizing a plurality of analog signals containing said noise generated by said signal oscillating means, said synthesizing means including a switch for switching said heads; phase synchronizing means for synchronizing a synthesizing operation of said synthesizing means with a given sampling clock signal; analog-digital converting means for converting an analog signal output from said synthesizing means into a digital signal in response to said sampling clock signal supplied to said phase synchronizing means; signal output approximating means for approximating said noise contained in said converted signal obtained by said analog-digital converting means with reference to both preceding and following signals, said signal output approximating means comprising a compensation processing circuit; and digital-analog converting means for converting said approximated signal output from said signal output approximating means into analog signal.

Claim 5

An analog signal synthesizing processing circuit according to claim 2, wherein; said sampling clock signal is supplied from timing signal oscillating means.

Claim 6

An analog signal synthesizing processing circuit according to claim 3, wherein; said phase synchronizing means comprises at least one flip-flop circuit and at least one delay circuit.

Claim 7

An analog signal synthesizing processing circuit according to claim 3, wherein; said phase synchronizing means contains clock-controlled delay circuit.

Claim 8

An analog signal synthesizing processing circuit according to claim 3, wherein; said phase synchronizing means comprises delay circuit, counter which is supplied with output signal from said delay circuit and sampling clock signal from said timing signal oscillating means, and decoder which outputs signal in response to said counter.

Claim 9

An analog signal synthesizing processing circuit according to claim 3, wherein; said phase synchronizing means comprises delay circuit, flip-flop circuit and integration circuit.

Claim 10

An analog signal synthesizing processing circuit with a periodic noise compensation, said circuit comprising: signal oscillating means for generating a plurality of analog signals containing noise being generated almost periodically, having at least two heads which slide on a magnetic tape to trace a track on the magnetic tape; synthesizing means for synthesizing a plurality of analog signals containing noise generated by said signal oscillating means which is a switch for switching said heads; timing signal oscillating means for supplying a predetermined sampling clock signal; phase synchronizing means for synchronizing a synthesizing operation of said synthesizing means with said sampling clock signal, having at least one flip-flop circuit and at least one delay circuit; analog-digital converting means for converting analog signal output from said synthesizing means into digital signal in response to said sampling clock signal supplied to said phase synchronizing means; signal output approximating means for approximating said noise contained in converted signal obtained by said analog-digital converting means with reference to both preceding and following signals, said signal output approximating means comprising interpolation data inserting means for replacing said noise with interpolation data, memory means for memorizing said interpolation data, interpolation data detecting means for detecting supplied interpolation data read out by said memory and least square approximation means for correcting by least square approximating said noise section in response to interpolation timing signal detected by said interpolation data detecting means; and digital-analog converting means for converting approximated signal output from said signal output approximating means into analog signal.

Claim 11

An analog signal synthesizing processing circuit with a periodic noise compensation, said circuit comprising: signal oscillating means for generating a plurality of analog signals containing noise being generated almost periodically, having at least two heads which slide on a magnetic tape to trace a track on the magnetic tape; synthesizing means for synthesizing a plurality of analog signals containing noise generated by said signal oscillating means which is a switch for switching said heads; timing signal oscillating means for supplying a predetermined sampling clock signal; phase synchronizing means for synchronizing a synthesizing operation of said synthesizing means with said sampling clock signal, having at least one flip-flop circuit and at least one delay circuit; analog-digital converting means for converting analog signal output from said synthesizing means into digital signal in response to said sampling clock signal supplied to said phase synchronizing means; signal output approximating means for approximating said noise contained in converted signal obtained by said analog-digital converting means with reference to both preceding and following signals, said signal output approximating means comprising interpolation data inserting means for replacing said noise with interpolation data, memory means for memorizing said interpolation data, interpolation data detecting means for detecting supplied interpolation data read out by said memory and least square approximation means for correcting by least square approximating said noise section in response to interpolation timing signal detected by said interpolation data detecting means; and digital-analog converting means for converting approximated signal output from said signal output approximating means into analog signal.

Claim 12

An analog signal synthesizing processing circuit according to claim 8, wherein; said synthesizing means switches a plurality of analog signals selectively and synthesizes.

Claim 13

An analog signal synthesizing processing circuit according to claim 9, wherein; said analog-digital converting means converts two signals output from said synthesizing means mutually.

Claim 14

An analog signal synthesizing processing circuit according to claim 9, wherein; said phase synchronizing means synchronizes said switching operation with the phase of said sampling clock signal supplied from said timing signal oscillating means.

Claim 15

An analog signal synthesizing processing circuit with a periodic noise compensation, said circuit comprising: signal oscillating means for generating a plurality of analog signals containing noise being generated almost periodically, having at least two heads which slide on a magnetic tape to trace a track on the magnetic tape; synthesizing means for synthesizing a plurality of analog signals containing noise generated by said signal oscillating means, which is a switch for switching said heads; timing signal oscillating means for supplying a predetermined sampling clock signal; phase synchronizing means for synchronizing a synthesizing operation of said synthesizing means with said sampling clock signal, having a delay circuit, a flip-flop circuit, and an integrated circuit; analog-digital converting means for converting analog signal output from said synthesizing means into digital signal in response to said sampling clock signal supplied to said phase synchronizing means; signal output approximating means for approximating said noise contained in converted signal obtained by said analog-digital converting means with reference to both preceding and following signals, said signal output approximating means comprising interpolation data inserting means for replacing said noise with interpolation data, memory means for memorizing said interpolation data, interpolation data detecting means for detecting supplied interpolation data read out by said memory and least square approximation means for correcting by least square approximating said noise section in response to interpolation timing signal detected by said interpolation data detecting means; and digital-analog converting means for converting approximated signal output from said signal output approximating means into analog signal.

Claim 16

An analog signal synthesizing processing circuit with a periodic noise compensation, said circuit comprising: signal oscillating means for generating a plurality of analog signals containing noise being generated almost periodically, having at least two heads which slide on a magnetic tape to trace a track on the magnetic tape; synthesizing means for synthesizing a plurality of analog signals containing noise generated by said signal oscillating means, which is a switch for switching said heads; timing signal oscillating means for supplying a predetermined sampling clock signal; phase synchronizing means for synchronizing a synthesizing operation of said synthesizing means with said sampling clock signal, having a delay circuit, a flip-flop circuit, and an integrated circuit; analog-digital converting means for converting analog signal output from said synthesizing means into digital signal in response to said sampling clock signal supplied to said phase synchronizing means; signal output approximating means for approximating said noise contained in converted signal obtained by said analog-digital converting means with reference to both preceding and following signals, said signal output approximating means comprising interpolation data inserting means for replacing said noise with interpolation data, memory means for memorizing said interpolation data, interpolation data detecting means for detecting supplied interpolation data read out by said memory and least square approximation means for correcting by least square approximating said noise section in response to interpolation timing signal detected by said interpolation data detecting means; and digital-analog converting means for converting approximated signal output from said signal output approximating means into analog signal.

Claim 17

An analog signal synthesizing processing circuit according to claim 12, wherein; said synthesizing means switches a plurality of analog signals selectively and synthesizes.

Claim 18

An analog signal synthesizing processing circuit according to claim 13, wherein; said analog-digital converting means converts two signals output from said synthesizing means mutually.

Claim 19

An analog signal synthesizing processing circuit according to claim 13, wherein; said phase synchronizing means synchronizes said switching operation with the phase of said sampling clock signal.