Apparatus for converting an analog balanced signal to a digital signal

Claim 1

An apparatus for converting an analog, balanced signal consisting of a differential signal pair to a digital signal by charge redistribution, comprising: a plurality of capacitive elements grouped equally in two sets, each capacitive element in a first set corresponding to a capacitive element of just as great a capacity in a second set; a corresponding plurality of switches connected in series with respective ones of said capacitive elements through which switches a first terminal of each capacitive element is selectively connected, at least during an approximation phase, to one of a first and second reference voltage the capacitive elements and associated switches in the first set being arranged to store a charge related to a potential at a first point and the corresponding capacitive elements and switches in the second set being arranged to store a charge related to a potential at a second point; analog sampling means causing a differential signal pair, at least during a sampling phase, to control the potential at said first and second points, respectively; a comparator comparing the potentials at said first and second points; and sampling and approximating logic means generating a digital word which is changed during the approximating phase in response to the comparison of the comparator, said digital word controlling said plurality of switches such that switching positions of the switches associated with the capacitive elements in the first set are only changed for half of a number of possible digital words and the switching positions of the switches associated with the corresponding capacitive elements in the second set are only changed for the other half of the number of possible digital words, and such that the switching positions of the switches associated with the capacitive elements in the first set are complemental to the switching positions of the switches associated with the corresponding capacitive elements in the second set for one of said halves of the number of possible digital words, said digital word at the end of the approximating phase constituting a digital output signal of the apparatus.

Claim 2

An apparatus for converting an analog, balanced signal consisting of a differential signal pair to a digital signal by charge redistribution, comprising: a plurality of capacitive elements grouped equally in two sets, each capacitive element in a first set corresponding to a capacitive element of just as great a capacity in a second set; a corresponding plurality of switches connected in series with respective ones of said capacitive elements through which switches a first terminal of each capacitive element is selectively connected, at least during an approximation phase, to one of a first and second reference voltage the capacitive elements and associated switches in the first set being arranged to store a charge related to a potential at a first point and the corresponding capacitive elements and switches in the second set being arranged to store a charge related to a potential at a second point; analog sampling means causing a differential signal pair, at least during a sampling phase, to control the potential at said first and second points, respectively; a comparator comparing the potentials at said first and second points; and sampling and approximating logic means generating a digital word which is changed during the approximating phase in response to the comparison of the comparator, said digital word controlling said plurality of switches such that switching positions of the switches associated with the capacitive elements in the first set are only changed for half of a number of possible digital words and the switching positions of the switches associated with the corresponding capacitive elements in the second set are only changed for the other half of the number of possible digital words, and such that the switching positions of the switches associated with the capacitive elements in the first set are complemental to the switching positions of the switches associated with the corresponding capacitive elements in the second set for one of said halves of the number of possible digital words, said digital word at the end of the approximating phase constituting a digital output signal of the apparatus.

Claim 5

An apparatus for converting an analog, balanced signal consisting of a differential signal pair to a digital signal by charge redistribution, comprising: a plurality of capacitive elements grouped equally in two sets, each capacitive element in a first set corresponding to a capacitive element of just as great a capacity in a second set, each set containing at least two capacitive elements the capacitances of which are equal and do not exceed the capacitance of any one of the remaining capacitive elements in both sets; a corresponding plurality of switches connected in series with respective ones of said capacitive elements through which switches a first terminal of each capacitive element is selectively connected, at least during an approximation phase, to one of a first and second reference voltage, the capacitive elements and associated switches in the first set being arranged to store a charge related to a potential at a first point and the corresponding capacitive elements and switches in the second set being arranged to store a charge related to a potential at a second point; analog sampling means causing said differential signal pair, at least during a sampling phase, to control the potential at a first and second points, respectively; a comparator comparing the potentials at said first and second points; and sampling and approximating logic means generating a digital word which is changed during the approximating phase in response to the comparison of the comparator, said digital word controlling said plurality of switches such that the switching position of the switch associated with one of said at least two capacitive elements in the first set is kept unchanged, while a switching position of the switch associated with the corresponding capacitive element in the second set is changed in response to a least significant bit in the digital word generated by said sampling and approximating logic means.

Claim 6

An apparatus for converting an analog, balanced signal consisting of a differential signal pair to a digital signal by charge redistribution, comprising: a plurality of capacitive elements grouped equally in two sets, each capacitive element in a first set corresponding to a capacitive element of just as great a capacity in a second set, each set containing at least two capacitive elements the capacitances of which are equal and do not exceed the capacitance of any one of the remaining capacitive elements in both sets; a corresponding plurality of switches connected in series with respective ones of said capacitive elements through which switches a first terminal of each capacitive element is selectively connected, at least during an approximation phase, to one of a first and second reference voltage, the capacitive elements and associated switches in the first set being arranged to store a charge related to a potential at a first point and the corresponding capacitive elements and switches in the second set being arranged to store a charge related to a potential at a second point; analog sampling means causing said differential signal pair, at least during a sampling phase, to control the potential at a first and second points, respectively; a comparator comparing the potentials at said first and second points; and sampling and approximating logic means generating a digital word which is changed during the approximating phase in response to the comparison of the comparator, said digital word controlling said plurality of switches such that the switching position of the switch associated with one of said at least two capacitive elements in the first set is kept unchanged, while a switching position of the switch associated with the corresponding capacitive element in the second set is changed in response to a least significant bit in the digital word generated by said sampling and approximating logic means.