US4849928A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Logic array programmer
Assignee: Individual
•
Filing: 1987-01-28
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Granted: 1989-07-18
•
Expires: 2007-01-28
Abstract
Abstract This logic array programmer which comprises a random access memory for storing a library of programmable array logic JEDEC files, including given device codes. The programmer also includes a permanent memory for storing a device code conversion table, for matching a device code to a different generic device. The programmer further comprises a conversion device for converting the programmable array logic JEDEC file into a generic array logic JEDEC file, and to program a generic array logic device therewith.
Inventors
- 👤 Lane T. Hauck
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 20:17
CPC Classifications
G; G06; G06F; G06F11/00; G06F11/006; G06F30/00; G06F30/30; G06F30/34
Claims Analysis
Total Claims: 25
Claim 1
Independent Claim
183 words
A logic array programmer for programming a generic array logic device corresponding to logic array file information for a certain array logic device, the information including given array logic design file information determining a given fuse pattern, and a device code information identifying a given type of logic array device, comprising: volatile memory means; means for storing signals indicative of the logic array file information in said volatile memory means; means for reading signals indicative of said given array logic device code information; permanent memory means for storing signals indicative of device code conversion table information; table look-up means for receiving said signals indicative of the array logic device code information for the generic array logic device to be programmed, corresponding to the read array logic device code information; means responsive to the received signals for converting said given array logic design file information into generic array logic design file information signals for the generic array logic device to be programmed; and means responsive to the last-mentioned means for programming the generic array logic device with said converted logic design file information signals.
Claim 2
Dependent Claim
183 words
A logic array programmer for programming a generic array logic device corresponding to logic array file information for a certain array logic device, the information including given array logic design file information determining a given fuse pattern, and a device code information identifying a given type of logic array device, comprising: volatile memory means; means for storing signals indicative of the logic array file information in said volatile memory means; means for reading signals indicative of said given array logic device code information; permanent memory means for storing signals indicative of device code conversion table information; table look-up means for receiving said signals indicative of the array logic device code information for the generic array logic device to be programmed, corresponding to the read array logic device code information; means responsive to the received signals for converting said given array logic design file information into generic array logic design file information signals for the generic array logic device to be programmed; and means responsive to the last-mentioned means for programming the generic array logic device with said converted logic design file information signals.
Claim 3
Dependent Claim
151 words
A logic array programmer for programming a generic array logic device corresponding to logic array file information for a certain array logic device, the information including given array logic design file information determining a given type of logic array device, comprising: volatile memory means; means for storing said signals indicative of the logic array file information in said volatile memory means; means for reading signals indicative of said given array logic design file information; input means to cause, in response to the single activation thereof the reading means to read said signals indicative of said given array logic design file information, and the storing means to store said signals in said volatile memory means when read by said reading means; and programming means for transferring said array logic design file information stored in said volatile memory meane from said volatile memory means to the generic array logic device for programming it.
Claim 4
Dependent Claim
151 words
A logic array programmer for programming a generic array logic device corresponding to logic array file information for a certain array logic device, the information including given array logic design file information determining a given type of logic array device, comprising: volatile memory means; means for storing said signals indicative of the logic array file information in said volatile memory means; means for reading signals indicative of said given array logic design file information; input means to cause, in response to the single activation thereof the reading means to read said signals indicative of said given array logic design file information, and the storing means to store said signals in said volatile memory means when read by said reading means; and programming means for transferring said array logic design file information stored in said volatile memory meane from said volatile memory means to the generic array logic device for programming it.
Claim 5
Dependent Claim
92 words
A logic array programmer according to claim 1, further including: means for storing signals indicative of a generic array logic design file information, including given device code information in said volatile memory means; means for reading signals indicative of said generic array logic design file information; and input means to cause, in response to the single activation thereof the reading means to read said signals indicative of said array logic design file information, and the storing means to store said signals in said volatile memory means when read by said reading means.
Claim 6
Dependent Claim
39 words
A logic array programmer according to claim 3, further including: programming means for transferring said array logic design file information stored in said volatile memory means from said volatile memory means to generic array logic device to be programmed.
Claim 7
Dependent Claim
17 words
A logic array programmer according to claim 1, further including: a message display for indicating device codes.
Claim 8
Dependent Claim
35 words
A logic array programmer according to claim 1, further including: socket means for receiving said generic array logic device to be read or programmed; and means for detecting missocketing of said generic array logic device.
Claim 9
Dependent Claim
16 words
A logic array programmer according to claim 5, wherein: said file information includes test vectors information.
Claim 10
Dependent Claim
28 words
A logic array programmer according to claim 7, wherein: said message display indicates said test vectors information, in response to a single activation of a single input device.
Claim 11
Dependent Claim
21 words
A logic array programmer according to claim 8, wherein: said message display indicates an error or mismatch in said test vectors.
Claim 12
Dependent Claim
25 words
A logic array programmer according to claim 1, further comprising: means for adding signals indicative of unique identification information for said programmable array logic device.
Claim 13
Dependent Claim
32 words
A logic array programmer according to claim 10, wherein: said signals indicative of unique identification information are stored in said volatile memory means, and are programmed in the generic array logic device.
Claim 14
Dependent Claim
23 words
A logic array programmer according to claim 11, further including: a message display for indicating said signals indicative of said unique identification information.
Claim 15
Dependent Claim
48 words
A logic array programmer according to claim 1, further comprising: port means for receiving said signals indicative of the programmable array logic design file information; and means for continuously scanning port means to detect the receipt of said signals indicative of the programmable array logic design file information.
Claim 16
Dependent Claim
23 words
A logic array programmer according to claim 13, wherein: said port means is a serial port for connection to a remote computer system.
Claim 17
Dependent Claim
17 words
A logic array programmer according to claim 6, wherein: said socket means comprises a pair of sockets.
Claim 18
Dependent Claim
26 words
A logic array programmer according to claim 15, further comprising: visual means indicative of the socket to be used for receiving the generic array logic device.
Claim 19
Independent Claim
156 words
A method of programming a generic array logic device corresponding to logic array file information for a certain array logic device, the information including given array logic design file information determining a given fuse pattern, and a device code information identifying a given type of logic device, comprising: storing signals indicative of the logic array file information in a volatile memory means; reading signals indicative of said given array logic device code information; storing signals indicative of device code conversion table information in a permanent memory means; receiving said signals indicative of the array logic device code information for the generic array logic device to be programmed, corresponding to the lead array logic device code information; converting said given array logic design file information into generic array logic design file information signals for the generic array logic device to be programmed; and programming the generic array logic device with said converted logic design file information signals.
Claim 20
Independent Claim
156 words
A method of programming a generic array logic device corresponding to logic array file information for a certain array logic device, the information including given array logic design file information determining a given fuse pattern, and a device code information identifying a given type of logic device, comprising: storing signals indicative of the logic array file information in a volatile memory means; reading signals indicative of said given array logic device code information; storing signals indicative of device code conversion table information in a permanent memory means; receiving said signals indicative of the array logic device code information for the generic array logic device to be programmed, corresponding to the lead array logic device code information; converting said given array logic design file information into generic array logic design file information signals for the generic array logic device to be programmed; and programming the generic array logic device with said converted logic design file information signals.
Claim 21
Dependent Claim
11 words
A method according to claim 17, further including: indicating device codes.
Claim 22
Independent Claim
165 words
A method of programming a generic array logic device corresponding to logic array file information for a certain array logic device, the information including given array logic design file information determining a given fuse pattern, and a device code information identifying a given type of logic array device, comprising: storing said signals indicative of the logic array file information in a volatile memory means; reading signals from a generic array logic device to be programmed, indicative of said signals being a given generic array logic device code information; actuating, by a single actuation, a user-actuable input device, to cause a reading means to read said signals indicative of said given array logic design file information, and to cause a storing means to store said read signals in the volatile memory means when read by said reading means; and transferring said array logic design file information stored in the volatile memory means from said volatile memory means to the generic array logic device for programming it.
Claim 23
Independent Claim
165 words
A method of programming a generic array logic device corresponding to logic array file information for a certain array logic device, the information including given array logic design file information determining a given fuse pattern, and a device code information identifying a given type of logic array device, comprising: storing said signals indicative of the logic array file information in a volatile memory means; reading signals from a generic array logic device to be programmed, indicative of said signals being a given generic array logic device code information; actuating, by a single actuation, a user-actuable input device, to cause a reading means to read said signals indicative of said given array logic design file information, and to cause a storing means to store said read signals in the volatile memory means when read by said reading means; and transferring said array logic design file information stored in the volatile memory means from said volatile memory means to the generic array logic device for programming it.
Claim 24
Independent Claim
212 words
A method of programming a generic array logic device corresponding to logic array file information for a certain array logic device, the information including given array logic design file information determining a given fuse pattern, and a device code information identifying a given type of logic array device, comprising: storing signals indicative of the logic array file information in volatile memory means; reading signals indicative of said given array logic device code information; storing signals indicative of device code conversion table information in permanent memory means; receiving said signals indicative of the array logic device code information for the generic array logic device to be programmed, corresponding to the read array logic device code; converting said given array logic design file information into generic array logic design file information signals for the generic array logic device to be programmed; responding to said converted signals for programming the generic array logic device with said converted logic design file information signals; storing signals indicative of a given array logic design file information, including given device code information in volatile memory means; reading signals indicative of said generic array logic design file information; reading said signals indicative of said array logic design file information, and storing said signals in the volatile memory means when read.
Claim 25
Independent Claim
212 words
A method of programming a generic array logic device corresponding to logic array file information for a certain array logic device, the information including given array logic design file information determining a given fuse pattern, and a device code information identifying a given type of logic array device, comprising: storing signals indicative of the logic array file information in volatile memory means; reading signals indicative of said given array logic device code information; storing signals indicative of device code conversion table information in permanent memory means; receiving said signals indicative of the array logic device code information for the generic array logic device to be programmed, corresponding to the read array logic device code; converting said given array logic design file information into generic array logic design file information signals for the generic array logic device to be programmed; responding to said converted signals for programming the generic array logic device with said converted logic design file information signals; storing signals indicative of a given array logic design file information, including given device code information in volatile memory means; reading signals indicative of said generic array logic design file information; reading said signals indicative of said array logic design file information, and storing said signals in the volatile memory means when read.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1992-07-17 | 1993-01-16 | 1993-07-18 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-07-17 | 1997-01-16 | 1997-07-18 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-07-17 | 2001-01-16 | 2001-07-18 | $7700.00 | Window Closed / Lapsed |