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US4849745A Expired / Lapsed US ⏱️ 0.0 years remaining

Multiple memory image display apparatus

Assignee: Toshiba Corp
•
Filing: 1988-01-14
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Granted: 1989-07-18
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Expires: 2008-01-14
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Abstract

Abstract In an image display apparatus, a frame memory for storing original data and a display memory for storing display data are used as memories for storing image data. The image data is read out from the display memory and is displayed by a display system. When image data transfer from the frame memory to the display memory is performed through a programmable data conversion memory, data conversion is performed as image processing. The image display apparatus has a masking memory having an image area corresponding to the frame memory. The masking memory stores image data indicating a desired transfer area in the frame memory as a mask pattern in advance. The image data transfer from the frame memory to the display memory is performed only for an area designated by the masking memory.

Inventors

  • 👤 Hitoshi Satou

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 11:28
CPC Classifications
G; G09; G09G; G09G5/00; G09G5/36; G09G5/39; G09G5/393

Claims Analysis

Total Claims: 10
Claim 1
Independent Claim 335 words
A multiple memory image display apparatus comprising: a frame memory for storing first image data; data converting means for converting the first image data to second image data in a predetermined format for display as a visual image corresponding to the first image data and for generating the second image data in response to the first image data being read out from said frame memory and transferred to said data converting means; a display memory, having a smaller memory capacity than said frame memory, for temporarily storing the second image data transferred from said data converting means; displaying means for reading out the second image data from said display memory in synchronism with a predetermined synchronizing signal and for displaying the visual image corresponding to the converted first image data; a masking memory, having a matrix structure corresponding to said frame memory, for storing masking pattern data corresponding to an image transfer area representing a part of the first image data which is to be transferred and displayed as a visual image; address signal generating means, responsive to the readout operation of the second image data from said display memory, for generating a read address signal in synchronism with the synchronizing signal, said read address signal being altered responsive to every occurrence of said synchronizing signal, said read address signal being sent to both said frame memory and said masking memory, said read address signal for transferrring the part of the first image data stored in said frame memory set by said image transfer area; and control means for controlling and synchronizing the reading of the first image data from said frame memory into said display memory and the reading of the masking pattern data from said masking memory into said display memory with the writing of a portion of a second image data corresponding to the masking pattern data from said data converting means into said display memory wherein said second image data are switched at a high speed in a cine type display.
Claim 2
Dependent Claim 335 words
A multiple memory image display apparatus comprising: a frame memory for storing first image data; data converting means for converting the first image data to second image data in a predetermined format for display as a visual image corresponding to the first image data and for generating the second image data in response to the first image data being read out from said frame memory and transferred to said data converting means; a display memory, having a smaller memory capacity than said frame memory, for temporarily storing the second image data transferred from said data converting means; displaying means for reading out the second image data from said display memory in synchronism with a predetermined synchronizing signal and for displaying the visual image corresponding to the converted first image data; a masking memory, having a matrix structure corresponding to said frame memory, for storing masking pattern data corresponding to an image transfer area representing a part of the first image data which is to be transferred and displayed as a visual image; address signal generating means, responsive to the readout operation of the second image data from said display memory, for generating a read address signal in synchronism with the synchronizing signal, said read address signal being altered responsive to every occurrence of said synchronizing signal, said read address signal being sent to both said frame memory and said masking memory, said read address signal for transferrring the part of the first image data stored in said frame memory set by said image transfer area; and control means for controlling and synchronizing the reading of the first image data from said frame memory into said display memory and the reading of the masking pattern data from said masking memory into said display memory with the writing of a portion of a second image data corresponding to the masking pattern data from said data converting means into said display memory wherein said second image data are switched at a high speed in a cine type display.
Claim 3
Dependent Claim 19 words
An apparatus according to claim 1, wherein said data converting means includes a data conversion table which is programmable.
Claim 4
Dependent Claim 32 words
An apparatus according to claim 1, wherein said data converting means includes a memory for storing the second image data at an address corresponding to the value of the first image data.
Claim 5
Dependent Claim 24 words
An apparatus according to claim 1, wherein the masking pattern data stored in said masking memory can be arbitrarily programmed by an external circuit.
Claim 6
Dependent Claim 30 words
An apparatus according to claim 1, wherein said address signal generating means can change a relative position of said image transfer area in said masking memory by an external circuit.
Claim 7
Dependent Claim 22 words
An apparatus according to claim 1, wherein said displaying means displays an image in response to a non-interlaced scanning method of scanning.
Claim 8
Dependent Claim 22 words
An apparatus according to claim 1, wherein said displaying means displays an image in response to an interlaced scanning method of scanning.
Claim 9
Dependent Claim 36 words
An apparatus according to claim 1, wherein said displaying means displays an image in response to an interlaced scanning method of scanning, and said display memory comprising an even-field memory portion and an odd-field memory portion.
Claim 10
Dependent Claim 58 words
An apparatus according to claim 1, wherein said displaying means displays an image in response to an interlaced scanning method of scanning said display memory comprises an even-field memory portion and an odd-field memory portion, and said address signal generating means generates an even-field address during an even-field display period and an odd-field address during an odd-field display.

References Cited (Backward Citations)

US3678497A Cited
US4069511A Cited
US4205389A Cited
US4256573A Cited
US4243984A Cited
US4356482A Cited
US4489389A Cited
US4622545A Cited
US4642790A Cited
US4642621A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1992-07-17 1993-01-16 1993-07-18 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1996-07-17 1997-01-16 1997-07-18 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2000-07-17 2001-01-16 2001-07-18 $7700.00 Window Closed / Lapsed

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