Frequency sensing and control circuit

Claim 1

An improved frequency sensing and control circuit, comprising a pair of analog to digital (A/D) converters connected to an encoder for receipt of input signals corresponding to a displacement of a mobile object, each being changeable in its working bit number, a pair of multipliers, each being connected to each said A/D converter, a comparator connected to said multipliers and issuing an up-down switch signal in accordance with the result of comparison of output signals from said multipliers, a counter connected to said comparator for receipt of said up-down switch signal and to a supply source of system clock pulses, and being changeable in its working bit number, a plurality of function generating read only memories (ROMs) of different bit numbers, each being connected to said multipliers, and a bit number control circuit connected to said A/D converters, said function generating ROMs and said counter, said bit number control circuit detecting the frequency of said input signals from said encoder and, on the basis of the result of detection, issuing an end of conversion control (EOC) signal which is passed to said A/D converters to reduce said working bit number of said A/D converters as said frequency rises, said bit number control circuit selecting, on the basis of the result of said detection, one of said function generating ROMs in accordance with said working bit number of said A/D converters fixed by said EOC signal, and said bit number control circuit further issuing, on the basis of the result of said detection, a T1 signal which is assigned to said counter and put in a higher bit as said frequency rises in order to fix the starting bit of its counting operation.