Apparatus and method for synchronizing a communication system

Claim 1

Apparatus for synchronizing a local clock signal with a remote clock signal, comprised of: (a) a voltage controlled master oscillator for generating a master oscillator signal, and a digital counter for receiving and frequency dividing said master oscillator signal and in response generating a phase increment signal having a frequency which is a multiple of the local clock signal frequency such that a predetermined number of phase increment signal cycles are generated during each local clock signal cycle, (b) a programmable logic device for receiving a plurality of clock signals from external sources and in response generating said remote clock signal derived from a predetermined selected one of said plurality of clock signals, (c) means for receiving said remote and phase increment signals and generating a count value corresponding to the number of cycles of said phase increment signal received during each received cycle of said remote clock signal, (d) means for receiving said count value and decreasing said local clock signal frequency in the event said count value is greater than said predetermined number of phase increment signal cycles, and increasing said local clock signal frequency in the event said count value is lower than said predetermined number of cycles, thereby synchronizing said local clock signal with said remote clock signal in both phase and frequency, said means for receiving said count value being further comprised of: (e) a microprocessor for comparing said count value with a predetermined acceptable range of stored values and generating a digital correction signal in response thereto, said correction signal being graded such that a large phase error produces a large amplitude correction signal while a small phase error produces a proportionately smaller amplitude correction signal, (f) a digital-to-analog converter for receiving said digital correction signal and in response generating an analog control voltage signal, and (g) said voltage controlled master oscillator for receiving said control voltage signal and in response generating said master oscillator signal having frequency proportional to the magnitude of said control voltage signal.