Electronic device with peripheral protective electrode

Claim 2

A semiconductor device encapsulated with a resin comprising: a substrate; a plurality of semiconductor regions formed in one major surface of said substrate for providing semiconductor elements; a first film comprised of an inorganic insulating material extending over said substrate; a first wiring layer formed over said first film and coupled to one of said semiconductor regions through an opening provided in said first film; a second film comprised of an organic insulating material, said second film being provided over said first wiring layer in said first film; and stress absorbing means for preventing deformation of said first wiring layer and said second film being formed adjacent to a peripheral portion of said substrate to absorb stress caused during curing of said resin, said stress absorbing means comprising a protective electrode which is made up of lower and upper metal wiring layers comprising aluminum, one superimposed above the other, and which penetrates said first and second films to connect said upper metal wiring layer to said lower metal wiring layer and said lower metal wiring layer to said substrate; said protective electrode being located outside of said semiconductor regions and away form said first wiring layer.

Claim 3

A semiconductor device according to claim 1, further comprising a bonding pad coupled to said first wiring layer at a location other than where said positive electrode is located.

Claim 4

A semiconductor device according to claim 1 wherein said protective electrode is provided around the complete periphery of said substrate.

Claim 5

A semiconductor device according to claim 1, further comprising a second wiring layer provided over said second film and coupled to said first wiring layer through an opening provided in said second film, wherein said protective electrode is also located between the outer periphery of said substrate and said second wiring layer formed adjacent to a peripheral portion of said substrate.

Claim 6

A semiconductor device according to claim 1, wherein said protective electrode is connected to a recess formed in the major surface of said substrate between an outer periphery of said substrate and said first wiring layer formed in a peripheral part of said substrate.

Claim 7

A semiconductor device according to claim 4, further comprising a bonding pad coupled to said first and second wiring layers at a location other than where said protective electrode is located.

Claim 8

A semiconductor device according to claim 1, wherein said first wiring layer includes a portion extending along a predetermined direction on said substrate, and wherein said protective electrode is arranged to extend substantially parallel to said portion in the same predetermined direction.

Claim 9

A semiconductor device according to claim 7, wherein said portion extending along a predetermined direction is substantially parallel to a peripheral edge of said outer periphery of said substrate.

Claim 10

A semiconductor device according to claim 1, wherein said protective electrode is comprised of metal.

Claim 11

A semiconductor device according to claim 1, wherein said first film is comprised of silicon dioxide.

Claim 12

A semiconductor device according to claim 1, wherein said first film is comprised of phosphosilicate glass.

Claim 13

A semiconductor device encapsulated with a resin comprising: a substrate; a plurality of semiconductor regions formed in one major surface of said substrate for providing semiconductor elements; a first film comprised of silicon dioxide extending over said substrate; a first wiring layer formed over said first film and coupled to one of said semiconductor regions through an opening provided in said first film, wherein said first wiring layer includes a portion extending lengthwise in a direction substantially parallel to a peripheral edge of an outer periphery of said substrate; a second film comprised of an organic resin, said second film being provided over said first wiring layer and said first film; a second wiring layer provided over said second film and coupled to said first wiring layer through an opening provided in said second film; and stress absorbing means for preventing deformation of said wiring layers in said second film being formed adjacent to a peripheral portion of said substrate to absorb stress caused during curing of said resin in a resin mold operation, said stress absorbing means comprises a protective electrode which is made up of lower and upper metal wiring layers comprising aluminum, one superimposed above the other, which penetrates said first and second films to connect said upper metal wiring layer to said lower metal wiring layer and said lower metal wiring layer to said substrate and which extends lengthwise in a direction substantially parallel to said portion of the first wiring layer; said protective electrode being located outside of the first wiring layer and away from said semiconductor regions.

Claim 14

A semiconductor device encapsulated with a resin comprising: a substrate; a plurality of semiconductor regions formed in one major surface of said substrate for providing semiconductor elements; a first film comprised of silicon dioxide extending over said substrate; a first wiring layer formed over said first film and coupled to one of said semiconductor regions through an opening provided in said first film, wherein said first wiring layer includes a portion extending lengthwise in a direction substantially parallel to a peripheral edge of an outer periphery of said substrate; a second film comprised of an organic resin, said second film being provided over said first wiring layer and said first film; a second wiring layer provided over said second film and coupled to said first wiring layer through an opening provided in said second film; and stress absorbing means for preventing deformation of said wiring layers in said second film being formed adjacent to a peripheral portion of said substrate to absorb stress caused during curing of said resin in a resin mold operation, said stress absorbing means comprises a protective electrode which is made up of lower and upper metal wiring layers comprising aluminum, one superimposed above the other, which penetrates said first and second films to connect said upper metal wiring layer to said lower metal wiring layer and said lower metal wiring layer to said substrate and which extends lengthwise in a direction substantially parallel to said portion of the first wiring layer; said protective electrode being located outside of the first wiring layer and away from said semiconductor regions.

Claim 15

A resin molded type semiconductor device comprising: a semiconductor chip which comprises a rectangular semiconductor body, a plurality of semiconductor regions formed in one major surface of said substrate for constructing semiconductor elements, an inorganic insulating film formed on the surface of said body, a first wiring layer formed over said insulating film and coupled to one of said semiconductor regions, a portion of said first wiring layer extending along a predetermined direction, an organic insulating film being provided over said first wiring layer and said inorganic insulating film, lower and upper metal layers comprising aluminum, one superimposed over the other, being positioned between an outer periphery of said body and said first wiring layer, said lower and upper metal layers together penetrating said inorganic and organic insulating films to connect said upper metal layer to said lower metal layer and said lower metal layer to said semiconductor body and extending lengthwise in a direction substantially parallel to the portion of said first wiring layer so that the lower and upper metal layers are not electrically connected to the first wiring layer; and a mold resin which encapsulates said semiconductor chip.

Claim 16

A resin molded type semiconductor device comprising: a semiconductor chip which comprises a rectangular semiconductor body, a plurality of semiconductor regions formed in one major surface of said substrate for constructing semiconductor elements, an inorganic insulating film formed on the surface of said body, a first wiring layer formed over said insulating film and coupled to one of said semiconductor regions, a portion of said first wiring layer extending along a predetermined direction, an organic insulating film being provided over said first wiring layer and said inorganic insulating film, lower and upper metal layers comprising aluminum, one superimposed over the other, being positioned between an outer periphery of said body and said first wiring layer, said lower and upper metal layers together penetrating said inorganic and organic insulating films to connect said upper metal layer to said lower metal layer and said lower metal layer to said semiconductor body and extending lengthwise in a direction substantially parallel to the portion of said first wiring layer so that the lower and upper metal layers are not electrically connected to the first wiring layer; and a mold resin which encapsulates said semiconductor chip.

Claim 17

A semiconductor device according to claim 13, wherein said inorganic insulating film is comprised of silicon dioxide and said organic insulating film is comprised of a polyimide resin film.

Claim 18

A semiconductor device according to claim 13, wherein said inorganic insulating film is comprised of phosphosilicate glass film and said organic insulating film is comprised of a polyimide resin film.