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US4835771A Expired / Lapsed US ⏱️ 0.0 years remaining

Integrated digital multiplexer circuit

Assignee: US Philips Corp
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Filing: 1988-10-07
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Granted: 1989-05-30
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Expires: 2008-10-07
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Abstract

Abstract A multiplexer module includes N input transistors (T 0 to T 3 ) whose bases receive input signals (E 0 . . . E 3 ), whose collectors are connected to ground and whose emitters are coupled to those of a multi-emitter output transister T' 4 . A logic addressing circuit (ALC) connects a current source I to one of the emitters of the input transistors (T 0 to T 3 ) as a function of an address (A 0 , A 1 ) received. Any reference voltage on the output transistor (T' 4 ) is suppressed by short-circuiting its base and its collector which constitutes the output S' which is connected to ground by way of an output resistor R' s . The module may be connected to other modules (having e.g. K inputs) within the same circuit, notably in order to realize a multiplexer having N k inputs without giving rise to stray coupling between the outputs of the various modules.

Inventors

  • 👤 Michel Moussie

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 17:50
CPC Classifications
H; H03; H03K; H03K17/00; H03K17/51; H03K17/56; H03K17/60; H03K17/62; H03K17/6257; H03K17/6264; H03K17/603; H03K3/00; H03K3/02; H03K3/26; H03K3/28; H03K3/281; H03K3/286; H03K3/288; H03K3/2885

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 207 words
An integrated multiplexer circuit comprising a plurality of input multiplexer modules being coupled to at least one output multiplexer module, each multiplexer module including an associated number of input terminals and an output terminal, the input terminal being formed by a base of an associated input transistor, whose collector is connected to a first supply terminal and whose emitter is connected to one of a plurality of electrodes of a first type of an output element, the output element having an electrode of a second type connected to the first supply terminal via an output resistance, the output terminal being formed by a connection between the output resistance and the electrode of the second type, and each multiplexer module further including a logic addressing circuit for receiving an address signal and, in dependence thereon, thereupon connecting a current source, connected to a second supply terminal, to the emitter of one of the input transistors of the relevant multiplexer module, characterized in that the output element of each input multiplexer module comprises a plurality of diodes, each diode having a first and a second terminal, the first terminals being the electrodes of the first type, the second terminals being interconnected and constituting the electrode of the second type.
Claim 2
Dependent Claim 207 words
An integrated multiplexer circuit comprising a plurality of input multiplexer modules being coupled to at least one output multiplexer module, each multiplexer module including an associated number of input terminals and an output terminal, the input terminal being formed by a base of an associated input transistor, whose collector is connected to a first supply terminal and whose emitter is connected to one of a plurality of electrodes of a first type of an output element, the output element having an electrode of a second type connected to the first supply terminal via an output resistance, the output terminal being formed by a connection between the output resistance and the electrode of the second type, and each multiplexer module further including a logic addressing circuit for receiving an address signal and, in dependence thereon, thereupon connecting a current source, connected to a second supply terminal, to the emitter of one of the input transistors of the relevant multiplexer module, characterized in that the output element of each input multiplexer module comprises a plurality of diodes, each diode having a first and a second terminal, the first terminals being the electrodes of the first type, the second terminals being interconnected and constituting the electrode of the second type.
Claim 3
Dependent Claim 200 words
An integrated multiplexer circuit comprising a plurality of input multiplexer modules being coupled to at least one output multiplexer module, each multiplexer module including an associated number of input terminals and an output terminal, the input terminal being formed by a base of an associated input transistor, whose collector is connected to a first supply terminal and whose emitter is connected to one of a plurality of electrodes of a first type of an output element, the output element having an electrode of a second type connected to the first supply terminal via an output resistance, the output terminal being formed by a connection between the output resistance and the electrode of the second type, and each multiplexer module further including a logic addressing circuit for receiving an address signal and, in dependence thereon, thereupon connecting a current source, connected to a second supply terminal, to the emitter of one of the input transistors of the relevant multiplexer module, characterized in that the output element of each input multiplexer module comprises a multi-emitter transistor having its base connected to its collector thereby constituting the electrode of the second type and having its emitters constituting the electrodes of the first type.
Claim 4
Dependent Claim 200 words
An integrated multiplexer circuit comprising a plurality of input multiplexer modules being coupled to at least one output multiplexer module, each multiplexer module including an associated number of input terminals and an output terminal, the input terminal being formed by a base of an associated input transistor, whose collector is connected to a first supply terminal and whose emitter is connected to one of a plurality of electrodes of a first type of an output element, the output element having an electrode of a second type connected to the first supply terminal via an output resistance, the output terminal being formed by a connection between the output resistance and the electrode of the second type, and each multiplexer module further including a logic addressing circuit for receiving an address signal and, in dependence thereon, thereupon connecting a current source, connected to a second supply terminal, to the emitter of one of the input transistors of the relevant multiplexer module, characterized in that the output element of each input multiplexer module comprises a multi-emitter transistor having its base connected to its collector thereby constituting the electrode of the second type and having its emitters constituting the electrodes of the first type.
Claim 5
Dependent Claim 24 words
An integrated multiplexer-circuit as claimed in claim 1 or 2, characterized in that the output multiplexer module and the input multiplexer modules are identical.
Claim 6
Dependent Claim 95 words
An integrated-multiplexer circuit as claimed in claim 1 or 2, whereby the output element of the output multiplexer module comprises a multi-emitter transistor, the collector thereof being the electrode of the second type, its emitters constituting the electrodes of the first and its base being connected to a reference voltage supply terminal, characterized in that the current sources in the multiplexer modules all have the same intensity, and the output resistances of the input multiplexer modules, each having mutually the same value, being twice the value of the output resistance of the output multiplexer module.

References Cited (Backward Citations)

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1992-05-29 1992-11-28 1993-05-30 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1996-05-29 1996-11-28 1997-05-30 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2000-05-29 2000-11-28 2001-05-30 $7700.00 Window Closed / Lapsed

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