US4833472A
Expired / Lapsed
US
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System for setting an analog resistor to a selectable, digitally predeterminable value
Assignee: Mannesmann VDO AG
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Filing: 1987-08-05
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Granted: 1989-05-23
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Expires: 2007-08-05
Abstract
Abstract An arrangement for setting an analog resistor to a value which is digitally predetermined. The arrangement contains a resistor (2) which is variable by a control voltage as setting member of a control circuit, in series with a measurement resistor (3) and a rotary-magnet ratio meter (26). This series connection is fed from an operating voltage. The voltage at the measurement resistor (3) and the digital value are each fed to inputs of a multiplier (5) the outputs of which are connected via a digital/analog converter (6) to an input of a subtraction circuit (7). The other input of the subtraction circuit (7) is acted on by a reference voltage. The output of the subtraction circuit (7) produces the control voltage for the adjustable resistor (2).
Inventors
- 👤 Joachim Hannappel
- 👤 Thomas Pfeifer
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 04:47
CPC Classifications
H; H03; H03H; H03H11/00; H03H11/02; H03H11/24; H03H11/245
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
189 words
A system for setting an analog resistor to a selectable value which is predetermined digitally in response to a digital value, comprising: a control circuit including variable resistor means and a measurement resistor; a source of operating voltage and a source of reference voltage; means for entering the digital value; multiplying means having first and second input terminals and being responsive to said digital value, said digital value being provided as an input signal to said multiplying means; a digital-to-analog converter, and a subtraction circuit having two input terminals; and wherein said variable resistor means is adjustable by a control voltage and is connected as a setting element in series with said measurement resistor to said operating voltage, a voltage drop across the measurement resistor and said digital value are fed respectively to said first and second input terminals of said multiplying means, an output of said multiplying means is connected via said digital/analog converter to one input of said subtraction circuit, a second input of said subtraction circuit receives said reference voltage, and an output of said subtraction circuit produces the control voltage for said variable resistor means.
Claim 2
Independent Claim
189 words
A system for setting an analog resistor to a selectable value which is predetermined digitally in response to a digital value, comprising: a control circuit including variable resistor means and a measurement resistor; a source of operating voltage and a source of reference voltage; means for entering the digital value; multiplying means having first and second input terminals and being responsive to said digital value, said digital value being provided as an input signal to said multiplying means; a digital-to-analog converter, and a subtraction circuit having two input terminals; and wherein said variable resistor means is adjustable by a control voltage and is connected as a setting element in series with said measurement resistor to said operating voltage, a voltage drop across the measurement resistor and said digital value are fed respectively to said first and second input terminals of said multiplying means, an output of said multiplying means is connected via said digital/analog converter to one input of said subtraction circuit, a second input of said subtraction circuit receives said reference voltage, and an output of said subtraction circuit produces the control voltage for said variable resistor means.
Claim 3
Dependent Claim
47 words
The system according to claim 1, further comprising a difference amplifier; and wherein a voltage drop (V 2 ) across said measurement resistor is connected to a noninverting input of said difference amplifier, and applied via said difference amplifier to the first input of the multiplying means.
Claim 4
Dependent Claim
83 words
The system according to claim 2, wherein said multiplying means comprises a plurality of analog switches receiving a voltage which is proportional to the voltage drop on the measurement resistor, the number of said switches corresponding to the number of parallel places of said digital value; and wherein individual ones of said switches have two states to be conductive or non-conductive as a function of the corresponding binary place value, the switches having outputs connected to an evaluation resistor of said digital/analog converter.
Claim 5
Dependent Claim
83 words
The system according to claim 1, wherein said multiplying means comprises a plurality of analog switches receiving a voltage which is proportional to the voltage drop on the measurement resistor, the number of said switches corresponding to the number of parallel places of said digital value; and wherein individual ones of said switches have two states to be conductive or non-conductive as a function of the corresponding binary place value, the switches have outputs connected to an evaluation resistor of said digital/analog converter.
Claim 6
Dependent Claim
38 words
The system according to claim 4 wherein said analog switches comprise CMOS field-effect transistors, and said converter comprises an R-2R network, said switches being connected in series with evaluation resistors of said R-2R network of the digital-analog converter.
Claim 7
Dependent Claim
32 words
The system according to claim 1 wherein said subtraction circuit is developed as a difference amplifier with a non-inverting input responsive to a voltage provided by operation of said variable resistor means.
Claim 8
Dependent Claim
38 words
The system according to claim 4, wherein inverting means are connected to respective control inputs of the analog switches to activate the respective switches in response to a value associated with a binary place of the digital value.
Claim 9
Dependent Claim
46 words
The system according to claim 1 wherein said control circuit further comprises a capacitor; and wherein said variable resistor means is developed as an MOS field-effect transistor, said capacitor being coupled between the gate electrode and the drain electrode of the transistor of said resistor means.
Claim 10
Dependent Claim
29 words
The system according to claim 8 wherein said control circuit further comprises a resistor connected in parallel to the drain-source path of the field-effect transistor of said resistor means.
Claim 11
Dependent Claim
32 words
The system according to claim 9 further comprising another capacitor connected between the drain electrode of the field-effect transistor of said resistor means and a terminal of said source of operating voltage.
Claim 12
Dependent Claim
36 words
The system according to claim 1 further comprising a ratio-meter; and wherein said variable resistor means and said measurement resistor are connected in series via a winding of said ratio-meter to said source of operating voltage.
Claim 13
Dependent Claim
13 words
The system according to claim 11 wherein said ratio-meter is a rotary-magnet ratio-meter.
References Cited (Backward Citations)
US4168492A
Cited
US4126852A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1992-05-22 | 1992-11-21 | 1993-05-23 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-05-22 | 1996-11-21 | 1997-05-23 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-05-22 | 2000-11-21 | 2001-05-23 | $7700.00 | Window Closed / Lapsed |