US4831431A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Capacitance stabilization
Assignee: Fairchild Semiconductor Corp
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Filing: 1986-03-31
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Granted: 1989-05-16
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Expires: 2006-03-31
Abstract
Abstract An integrated circuit using interconnection of opposite plates of multiple capacitors formed therein to stabilize composite capacitor parameters.
Inventors
- 👤 Michael M. Hanlon
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 15:14
CPC Classifications
H; H10; H10D; H10D1/00; H10D1/60; H10D1/62; H10D1/66; H10D84/00; H10D84/201; H10D84/204; H10D84/212; Y; Y10; Y10S; Y10S257/00; Y10S257/925
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
307 words
A digital to analog or analog to digital converter circuit wherein at least one capacitor is charged in response to an input voltage to be converted, said capacitor comprising: a body of semiconductor material of a first conductivity type except in selected portions, said body having a first major surface; a plurality of surface vicinity plates including first and second surface vicinity plates located relatively close to said first major surface each an electrical conductor and each electrically insulated from one another; a plurality of surface distal plates outside said body of semiconductor material including first and second surface distal plates located relatively farther from said first major surface than are said plurality of surface vicinity plates, each of said first and second surface distal plates being an electrical conductor and each electrically insulated from one another; a pair of insulating layer portions including first and second insulating layer portions each serving as electrical insulators with said first insulating layer portion separating said first surface vicinity plate from said first surface distal plate which are opposite oee another on opposite sides of said first insulating layer portion, and with said second insulating layer portion separating said second surface vicinity plate from said second surface distal plate which are opposite one another on opposite sides of said second insulating layer portion; and an electrical interconnection network at least a portion of which electrically connects saidffirst surface vicinity plate to said second surface distal plate and serves as a first terminating region for said capacitor, and at least another portion of which electrically connects said second surface vicinity plate to said first surface distal plate and serves as a second terminating region for said capacitor, wherein said input voltage is selectively applied to said first terminating region and a reference voltage is selectively applied to said second terminating region.
Claim 2
Dependent Claim
307 words
A digital to analog or analog to digital converter circuit wherein at least one capacitor is charged in response to an input voltage to be converted, said capacitor comprising: a body of semiconductor material of a first conductivity type except in selected portions, said body having a first major surface; a plurality of surface vicinity plates including first and second surface vicinity plates located relatively close to said first major surface each an electrical conductor and each electrically insulated from one another; a plurality of surface distal plates outside said body of semiconductor material including first and second surface distal plates located relatively farther from said first major surface than are said plurality of surface vicinity plates, each of said first and second surface distal plates being an electrical conductor and each electrically insulated from one another; a pair of insulating layer portions including first and second insulating layer portions each serving as electrical insulators with said first insulating layer portion separating said first surface vicinity plate from said first surface distal plate which are opposite oee another on opposite sides of said first insulating layer portion, and with said second insulating layer portion separating said second surface vicinity plate from said second surface distal plate which are opposite one another on opposite sides of said second insulating layer portion; and an electrical interconnection network at least a portion of which electrically connects saidffirst surface vicinity plate to said second surface distal plate and serves as a first terminating region for said capacitor, and at least another portion of which electrically connects said second surface vicinity plate to said first surface distal plate and serves as a second terminating region for said capacitor, wherein said input voltage is selectively applied to said first terminating region and a reference voltage is selectively applied to said second terminating region.
Claim 3
Dependent Claim
20 words
The apparatus of claim 1 wherein said first and second surface vicinity plates are each constructed of doped polycrystalline silicon.
Claim 4
Dependent Claim
34 words
The apparatus of claim 1 wherein each of said first and second surface vicinity plates are constructed in said body of semiconductor material in selected portions thereof which are of a second conductivity type.
Claim 5
Dependent Claim
20 words
The apparatus of claim 1 wherein said first and second surface distal plates are each constructed of doped polycrystalline silicon.
Claim 6
Dependent Claim
20 words
The apparatus of claim 2 wherein said first and second surface distal plates are each constructed of doped polycrystalline silicon.
Claim 7
Dependent Claim
20 words
The apparatus of claim 3 wherein said first and secodd surface distal plates are each constructed of doped polycrystalline silicon.
Claim 8
Dependent Claim
33 words
The apparatus of claim 3 wherein each of said first and second surface distal plates are constructed of metal, said interconnection network portions and said terminating regions also being constructed of said metal.
Claim 9
Dependent Claim
19 words
The apparatus of claim 4 wherein said electrical interconnection network portions and said terminating regions are constructed of metal.
References Cited (Backward Citations)
US4475118A
Cited
US4626881A
Cited
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| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 1992-05-15 | 1992-11-14 | 1993-05-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-05-15 | 1996-11-14 | 1997-05-16 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-05-15 | 2000-11-14 | 2001-05-16 | $7700.00 | Window Closed / Lapsed |