US4829265A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Operational amplifier
Assignee: Semiconductor Components Industries LLC
•
Filing: 1988-05-23
•
Granted: 1989-05-09
•
Expires: 2008-05-23
Abstract
Abstract An operational amplifier includes a first and second input JFETs having gate electrodes which are coupled to first and second input terminals respectively. A single ended output is taken from the drain of one of the JFETs and applied to an output gain stage including a Miller compensation capacitor. Circuitry is provided for producing a low impedance at the drain of the second JFET at high operating frequencies. This circuitry comprises an NPN transistor having an emitter coupled to ground, a base coupled to the drain of the first JFET, and a collector coupled via a resistor to the common sources of the input JFETs. A capacitor is coupled between the collector of the NPN transistor and the drain of the first JFET.
Inventors
- 👤 David M. Susak
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 12:21
CPC Classifications
H; H03; H03F; H03F1/00; H03F1/08; H03F1/083; H03F1/086
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
144 words
An operational amplifier having first and second input terminals, comprising: an output stage having an input and an output; a first capacitor having a first terminal coupled to said input and a second terminal coupled to said output; a first JFET having a source coupled to a first power supply terminal, a gate coupled to said first input terminal and having a drain; a second JFET having a source coupled to said first power supply terminal and to the source of said first JFET, a gate coupled to said second input, and a drain coupled to the input of said output stage and to a second power supply terminal; and first means coupled between the sources of said first and second JFETs and said second power supply terminal for producing a low impedance at the drain of said first JFET at high operating frequencies.
Claim 2
Dependent Claim
144 words
An operational amplifier having first and second input terminals, comprising: an output stage having an input and an output; a first capacitor having a first terminal coupled to said input and a second terminal coupled to said output; a first JFET having a source coupled to a first power supply terminal, a gate coupled to said first input terminal and having a drain; a second JFET having a source coupled to said first power supply terminal and to the source of said first JFET, a gate coupled to said second input, and a drain coupled to the input of said output stage and to a second power supply terminal; and first means coupled between the sources of said first and second JFETs and said second power supply terminal for producing a low impedance at the drain of said first JFET at high operating frequencies.
Claim 3
Dependent Claim
103 words
An operational amplifier according to claim 1 wherein said first means comprises: an NPN transistor having an emitter coupled to said second power supply terminal, a base coupled to the drain of said first JFET and having a collector; a second capacitor having a first terminal coupled to the collector of said transistor and a second terminal coupled to the drain of said first JFET; and a resistor having a first terminal coupled to the collector of said transistor and to the first terminal of said second capacitor and having a second terminal coupled to the sources of said first and second JFETs.
Claim 4
Dependent Claim
47 words
An operational amplifier according to claim 2 further comprising: a first current source having a first terminal coupled to said first power supply terminal and having a second terminal coupled to the sources of said first and second JFETs and to the second terminal of said resistor.
Claim 5
Dependent Claim
60 words
An operational amplifier according to claim 3 further comprising: a second current source coupled between the drain of said first JFET and said second power supply terminal for conducting a current I x ; and a third current source coupled between the drain of said second JFET and said second power supply terminal for conducting a current I x .
Claim 6
Dependent Claim
162 words
An improved JFET input stage for an operational amplifier of the type which includes an output stage having an input and an output and a first capacitor having a first terminal coupled to said input and a second terminal coupled to said output, said input stage comprising: a first JFET having a source coupled to a first power supply terminal, a gate coupled to a first input terminal of said input stage and having a drain; a second JFET having a source coupled to said first power supply terminal and to the source of said first JFET, a gate coupled to a second input terminal of said input stage, and a drain coupled to the input of said output stage and to a second power supply terminal; and first means coupled between the sources of said first and second JFETs and said second power supply terminal for producing a low impedance at the drain of said first JFET at high operating frequencies.
Claim 7
Dependent Claim
162 words
An improved JFET input stage for an operational amplifier of the type which includes an output stage having an input and an output and a first capacitor having a first terminal coupled to said input and a second terminal coupled to said output, said input stage comprising: a first JFET having a source coupled to a first power supply terminal, a gate coupled to a first input terminal of said input stage and having a drain; a second JFET having a source coupled to said first power supply terminal and to the source of said first JFET, a gate coupled to a second input terminal of said input stage, and a drain coupled to the input of said output stage and to a second power supply terminal; and first means coupled between the sources of said first and second JFETs and said second power supply terminal for producing a low impedance at the drain of said first JFET at high operating frequencies.
Claim 8
Dependent Claim
96 words
An improved input stage according to claim 5 wherein said first means comprises: an NPN transistor having an emitter coupled to said second power supply terminal, a base coupled to the drain of said first JFET and having a collector; a second capacitor having a first terminal coupled to the collector of said NPN transistor and a second terminal coupled to the drain of said first JFET; and a resistor having a first terminal coupled to the collector of said NPN transistor and a second terminal coupled to the sources of said first and second JFETs.
Claim 9
Dependent Claim
40 words
An improved input stage according to claim 6 further comprising a first current source having a first terminal coupled to said first power supply terminal and having a second terminal coupled to the sources of said first and second JFETs.
Claim 10
Dependent Claim
61 words
An improved input stage according to claim 7 further comprising: a second current source coupled between the drain of said first JFET and said second power supply terminal for conducting a current I x ; and a third current source coupled between the drain of said second JFET and said second power supply terminal for conducting a current I x .
References Cited (Backward Citations)
US4701718A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1992-05-08 | 1992-11-07 | 1993-05-09 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-05-08 | 1996-11-07 | 1997-05-09 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-05-08 | 2000-11-07 | 2001-05-09 | $7700.00 | Window Closed / Lapsed |