← Back to Patent Explorer
US4827207A Expired / Lapsed US ⏱️ 0.0 years remaining

Linear load current measurement circuit

Assignee: STMicroelectronics SRL
•
Filing: 1987-12-04
•
Granted: 1989-05-02
•
Expires: 2007-12-04
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A circuit for the linear measurement of a current flowing through a load which comprises a current sensor consisting of a resistor, and a first driver transistor connected to the load and a second transistor connected to the resistor, both transistors being field effect transistors interconnected into a current mirror configuration, which includes an operational amplifier having its inputs respectively connected to the drain electrodes of the first and second transistors to regulate the drain-source voltage of the transistors and enable linear measurement of the load current irrespective of the operating temperature.

Inventors

  • 👤 Davide Chieli

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 18:48
CPC Classifications
G; G01; G01R; G01R31/00; G01R19/00; G01R19/0092; G01R19/32

Claims Analysis

Total Claims: 10
Claim 1
Independent Claim 84 words
A circuit for the linear measurement of a current flowing through a load, for the linear measurement of a current sensor, and a first driver transistor connected to the load and a second transistor connected to said current sensor, both said transistors being field effect transistors and interconnected into a current mirror configuration, characterized in that it comprises a voltage regulator connected electrically to respective drain electrodes of the first and second transistors to maintain across both transistors the same values of drain-source voltage.
Claim 2
Dependent Claim 84 words
A circuit for the linear measurement of a current flowing through a load, for the linear measurement of a current sensor, and a first driver transistor connected to the load and a second transistor connected to said current sensor, both said transistors being field effect transistors and interconnected into a current mirror configuration, characterized in that it comprises a voltage regulator connected electrically to respective drain electrodes of the first and second transistors to maintain across both transistors the same values of drain-source voltage.
Claim 3
Dependent Claim 47 words
A circuit according to claim 1, characterized in that said voltage regulator is an operational amplifier having its inputs respectively connected to the drain electrodes of said first and said second transistors and its output connected to the drain of the second transistor through said current sensor.
Claim 4
Dependent Claim 16 words
A circuit according to claim 1, characterized in that said current sensor consists of a resistor.
Claim 5
Dependent Claim 28 words
A circuit according to claim 1 or 2, characterized in that the inverting input of said amplifier (A1) is connected to said drain electrode of the second transistor.
Claim 6
Dependent Claim 77 words
A linear load-current measuring circuit comprising: a first driver field effect transistor having source, drain and gate electrodes and connected to the load, a current sensor, a second field effect transistor having source, drain and gate electrodes and connected to said current sensor, means for interconnecting said first and second transistors in a current mirror circuit arrangement, and means connected to the first and second transistors for maintaining the same values of drain-source voltage across both transistors.
Claim 7
Dependent Claim 77 words
A linear load-current measuring circuit comprising: a first driver field effect transistor having source, drain and gate electrodes and connected to the load, a current sensor, a second field effect transistor having source, drain and gate electrodes and connected to said current sensor, means for interconnecting said first and second transistors in a current mirror circuit arrangement, and means connected to the first and second transistors for maintaining the same values of drain-source voltage across both transistors.
Claim 8
Dependent Claim 23 words
A circuit as set forth in claim 5 wherein the gate and source electrodes of the first and second transistors are commonly connected.
Claim 9
Dependent Claim 15 words
A circuit as set forth in claim 6 wherein the common source connection is grounded.
Claim 10
Dependent Claim 46 words
A circuit as claimed in claim 7 wherein the means for maintaining comprises an operational amplifier having an inverting input connected to the second transistor drain electrode and a non-inverting input connected to the first transistor drain electrode, and an output connected to the current sensor.

References Cited (Backward Citations)

US4251743A Cited
GB2071951A Cited
US4319181A Cited
GB2149517A Cited
US4553084A Cited
US4599554A Cited
EP0219682A2 Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1992-05-01 1992-10-31 1993-05-02 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1996-05-01 1996-10-31 1997-05-02 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2000-05-01 2000-10-31 2001-05-02 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag