Image signal compressor

Claim 2

A signal compressor, which comprises: (a) a first resistor, a signal to be compressed being applied to one end thereof; (b) a diode connected to said first resistor, a compressed signal being derived from a junction point between said first resistor and said diode; (c) a second resistor connected in series with said diode; and (d) control means responsive to the signal to be compressed and to said compressed signal, said control means connected to said second resistor for controlling a compression start potential at which said diode is allowed to be conductive in such a way as to decrease the compression start potential with increasing peak voltage level of the signal to be compressed, when said diode is conductive, the signal to be compressed being compressed at a compression ration determined by said first and second resistors, said diode being poled so that diode is conductive whenever the signal to be compressed is greater than said compression start potential, said control means including means responsive to said peak voltage level of said signal to be compressed for establishing said compression start potential at a level which makes the compressed signal corresponding to said peak voltage level equal to a predetermined level, wherein said signal compressor does not compress levels of signal to be compressed which are less than said compression start potential, and wherein said predetermined level is approximately 10% greater than the highest level of the signal to be compressed which is not compressed by said signal compressor.

Claim 3

An image signal processor, comprising, in combination; (a) three first resistors, means for applying a respective one of three chrominance signals to be compressed to one end of each of said first resistors, (b) three diodes respectively connected to said first three resistors, three compressed chrominance signals being derived from the respective junction points between said first resistors and said three diodes, (c) three second resistors respectively connected in series with said three diodes; and (d) control means responsive to each of the three chrominance signals to be compressed and connected to said three second resistors for controlling the compression start potential at which said three diodes are allowed to be conductive in such a way as to decrease said compression start potential with increasing highest peak voltage level of the three chrominance signals to be compressed or increase said compression start potential with decreasing highest peak voltage level of the three chrominance signals to be compressed, when said three diodes are conductive, the three chrominance signals to be compressed being compressed at respective compression ratios determined by said three first resistors and said three second resistors.

Claim 4

An image signal processor, comprising, in combination; (a) three first resistors, means for applying a respective one of three chrominance signals to be compressed to one end of each of said first resistors, (b) three diodes respectively connected to said first three resistors, three compressed chrominance signals being derived from the respective junction points between said first resistors and said three diodes, (c) three second resistors respectively connected in series with said three diodes; and (d) control means responsive to each of the three chrominance signals to be compressed and connected to said three second resistors for controlling the compression start potential at which said three diodes are allowed to be conductive in such a way as to decrease said compression start potential with increasing highest peak voltage level of the three chrominance signals to be compressed or increase said compression start potential with decreasing highest peak voltage level of the three chrominance signals to be compressed, when said three diodes are conductive, the three chrominance signals to be compressed being compressed at respective compression ratios determined by said three first resistors and said three second resistors.

Claim 5

A signal compressor, which comprises: (a) three first resistors, three chrominance signals to be compressed being applied to respective ends thereof; (b) three diodes respectively connected to said three first resistors, compressed signals being derived from junction points between said first resistors and said diodes; (c) three resistors respectively connected in series with said diodes; (d) a non-adder mixer responsive to said three chrominance signals to be compressed for producing a signal corresponding to highest peak levels of said chrominance signals to be compressed; (e) a peak rectifier for rectifying the produced signal; and (f) a dc amplifier connected between said peak rectifier and said three second resistors for decreasing a compression start potential for each of said three compression ratios in response to an increase in the produce signal.

Claim 6

A signal compressor, which comprises: (a) three first resistors, three chrominance signals to be compressed being applied to respective ends thereof; (b) three diodes respectively connected to said three first resistors, compressed signals being derived from junction points between said first resistors and said diodes; (c) three resistors respectively connected in series with said diodes; (d) a non-adder mixer responsive to said three chrominance signals to be compressed for producing a signal corresponding to highest peak levels of said chrominance signals to be compressed; (e) a peak rectifier for rectifying the produced signal; and (f) a dc amplifier connected between said peak rectifier and said three second resistors for decreasing a compression start potential for each of said three compression ratios in response to an increase in the produce signal.

Claim 7

An image signal compressor, which comprises: (a) a respective one of three first resistors, means for applying three chrominance signals to be compressed to one end of each said first resistors; (b) three diodes respectively connected to said three first resistors, three compressed chrominance signals being derived from respective junction points between said first resistors and said three diodes; (c) three second resistors respectively connected in series with said three diodes; and (d) control means responsive to each of the three chrominance signals to be compressed and connected to said three second resistors for controlling the compression start potential at which said three diodes are allowed to be conductive in such a way as to decrease said compression start potential with increasing highest peak voltage level of the three chrominance signals to be compressed or increase said compression start potential with decreasing highest peak voltage level of the three chrominance signals to be compressed, when said three diodes are conductive, the three chrominance signals to be compressed being compressed at respective compression ratios determined by said three first resistors and said three second resistors, said control means having a plurality of inputs, connected respectively to said junction points, whereby said control means is responsive to the chrominance signals to be compressed and the compressed chrominance signals.

Claim 8

An image signal compressor, which comprises: (a) a respective one of three first resistors, means for applying three chrominance signals to be compressed to one end of each said first resistors; (b) three diodes respectively connected to said three first resistors, three compressed chrominance signals being derived from respective junction points between said first resistors and said three diodes; (c) three second resistors respectively connected in series with said three diodes; and (d) control means responsive to each of the three chrominance signals to be compressed and connected to said three second resistors for controlling the compression start potential at which said three diodes are allowed to be conductive in such a way as to decrease said compression start potential with increasing highest peak voltage level of the three chrominance signals to be compressed or increase said compression start potential with decreasing highest peak voltage level of the three chrominance signals to be compressed, when said three diodes are conductive, the three chrominance signals to be compressed being compressed at respective compression ratios determined by said three first resistors and said three second resistors, said control means having a plurality of inputs, connected respectively to said junction points, whereby said control means is responsive to the chrominance signals to be compressed and the compressed chrominance signals.

Claim 9

An image signal compressor which comprises: (a) three first resistors, means for applying a respective one of three chrominance signals to be compressed to one end of each of said first resistors; (b) three diodes respectively connected to said three first resistors, three compressed chrominance signals being derived from respective junction points between said first resistors and said three diodes; (c) three second resistors respectively connected in series with said three diodes; (d) control means responsive to each of the three chrominance signals to be compressed and connected to said three second resistors for controlling the compression start potential at which said three diodes are allowed to be conductive in such a way as to decrease said compression start potential with increasing highest peak voltage level of the three chrominance signals to be compressed or increase said compression start potential with decreasing highest peak voltage level of the three chrominance signals to be compressed, when said three diodes are conductive, the three chrominance signals to be compressed being compressed at respective compression ratios determined by said three first resistors and said three second resistors, each of said diodes being poled to be conductive when the respective chrominance signal to be compressed exceeds said compression start potential.

Claim 10

An image signal compressor which comprises: (a) three first resistors, means for applying a respective one of three chrominance signals to be compressed to one end of each of said first resistors; (b) three diodes respectively connected to said three first resistors, three compressed chrominance signals being derived from respective junction points between said first resistors and said three diodes; (c) three second resistors respectively connected in series with said three diodes; (d) control means responsive to each of the three chrominance signals to be compressed and connected to said three second resistors for controlling the compression start potential at which said three diodes are allowed to be conductive in such a way as to decrease said compression start potential with increasing highest peak voltage level of the three chrominance signals to be compressed or increase said compression start potential with decreasing highest peak voltage level of the three chrominance signals to be compressed, when said three diodes are conductive, the three chrominance signals to be compressed being compressed at respective compression ratios determined by said three first resistors and said three second resistors, each of said diodes being poled to be conductive when the respective chrominance signal to be compressed exceeds said compression start potential.

Claim 11

The signal compressor according to claim 5, wherein said control means includes means responsive to the highest peak value of any said three chrominance signals to be compressed, and for establishing said compression start potential at a level which makes the peak voltage level of at least one of the compressed signals equal to as predetermined level.

Claim 12

The signal compressor according to claim 5, wherein said control means includes means for establishing said compression start potential, for different highest peak voltage levels of the chrominance signals to be compressed, such that the corresponding peak voltage level is of at least one of the compressed signals equal to a predetermined level.

Claim 13

The single compressor according to claim 5, wherein said control means has an output characteristic, relative to the level of at least one of said chrominance signals to be compressed, with a first leg rising to said compression start potential, and a second leg rising from a compression start potential to said predetermined level.

Claim 14

A single compressor, which comprises: (a) a first resistor, a signal to be compressed being applied to one and thereof; (b) a diode connected to said first resistor, a compressed signal being derived from a junction point between said first resistor and said diode; (c) a second resistor connected in series with said diode; and (d) control means responsive to the signal to be compressed and to said compressed signal, said control means connected to said second resistor for controlling a compression start potential at which said diode is allowed to be conductive in such a way as to decrease the compression start potential with increasing peak voltage level of the signal to be compressed, when said diode is conductive, the signal to be compressed being compressed at a compression ratio determined by said first and second resistors, said control means comprising (e) a peak rectifier responsive to the signal to be compressed for rectifying a received peak voltage level of the signal; and (f) a dc amplifier connected between said peak rectifier and said second resistor for decreasing the compression start potential with increasing rectified peak voltage level of the received signal, said control means including means responsive to said peak voltage level of said signal to be compressed establishing said compression start potential at a level which makes the corresponding peak voltage level of the compressed signal equal to a predetermined level, and said control means including means for establishing different compression start potentials for different peak values of the signal to be compressed, such that the compressed value of each of said peak values of equal to said predetermined level.

Claim 15

A single compressor, which comprises: (a) a first resistor, a signal to be compressed being applied to one and thereof; (b) a diode connected to said first resistor, a compressed signal being derived from a junction point between said first resistor and said diode; (c) a second resistor connected in series with said diode; and (d) control means responsive to the signal to be compressed and to said compressed signal, said control means connected to said second resistor for controlling a compression start potential at which said diode is allowed to be conductive in such a way as to decrease the compression start potential with increasing peak voltage level of the signal to be compressed, when said diode is conductive, the signal to be compressed being compressed at a compression ratio determined by said first and second resistors, said control means comprising (e) a peak rectifier responsive to the signal to be compressed for rectifying a received peak voltage level of the signal; and (f) a dc amplifier connected between said peak rectifier and said second resistor for decreasing the compression start potential with increasing rectified peak voltage level of the received signal, said control means including means responsive to said peak voltage level of said signal to be compressed establishing said compression start potential at a level which makes the corresponding peak voltage level of the compressed signal equal to a predetermined level, and said control means including means for establishing different compression start potentials for different peak values of the signal to be compressed, such that the compressed value of each of said peak values of equal to said predetermined level.

Claim 16

A signal compressor, which comprises: (a) a first resistor, a signal to be compressed being applied to one end thereof; (b) a diode connected to said first resistor, a compressed signal being derived from a junction point between said first resistor and said diode; (c) a second resistor connected in series with said diode; and (d) control means responsive to the signal to be compressed and to said compressed signal, said control means connected to said second resistor for controlling a compression start potential at which said diode is allowed to be conductive in such a way as to decrease the compression start potential with increasing peak voltage level of the signal to be compressed or, when said diode is conductive, the signal to be compressed being compressed at a compression ratio determined by said first and second resistors, said control means comprising (e) a peak rectifier responsive to the signal to be compressed for rectifying a received peak voltage level of the signal; and (f) a dc amplifier connected between said peak rectifier and said second resistor for decreasing the compression start potential with increasing rectified peak voltage level of the received signal, said control means including means responsive to said peak voltage level of said signal to be compressed for establishing said compression start potential at a level which makes the corresponding compressed signal equal to a predetermined level, said signal compressor having an output characteristic, relative to the level of said signal to be compressed, with a first leg rising to said compression start potential, and a second leg rising from said compression start potential to said predetermined level.

Claim 17

A signal compressor, which comprises: (a) a first resistor, a signal to be compressed being applied to one end thereof; (b) a diode connected to said first resistor, a compressed signal being derived from a junction point between said first resistor and said diode; (c) a second resistor connected in series with said diode; and (d) control means responsive to the signal to be compressed and to said compressed signal, said control means connected to said second resistor for controlling a compression start potential at which said diode is allowed to be conductive in such a way as to decrease the compression start potential with increasing peak voltage level of the signal to be compressed or, when said diode is conductive, the signal to be compressed being compressed at a compression ratio determined by said first and second resistors, said control means comprising (e) a peak rectifier responsive to the signal to be compressed for rectifying a received peak voltage level of the signal; and (f) a dc amplifier connected between said peak rectifier and said second resistor for decreasing the compression start potential with increasing rectified peak voltage level of the received signal, said control means including means responsive to said peak voltage level of said signal to be compressed for establishing said compression start potential at a level which makes the corresponding compressed signal equal to a predetermined level, said signal compressor having an output characteristic, relative to the level of said signal to be compressed, with a first leg rising to said compression start potential, and a second leg rising from said compression start potential to said predetermined level.