US4821087A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Encoder circuit eliminating carrier leak
Assignee: Panasonic Holdings Corp
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Filing: 1987-04-20
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Granted: 1989-04-11
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Expires: 2007-04-20
Abstract
Abstract Disclosed is an encoder circuit for converting a color difference signa into a carrier chrominance signal for use in a component VTR, camera, etc. The color difference signal is clamped by an automatic clamper, and then, this signal is used for balanced-modulating a color subcarrier whereby a first balanced-modulated output is obtained. Then, within a conversion circuit receiving the color subcarrier and the first balanced-modulated output as inputs thereto, a carrier leak existing in a predetermined period of the first balanced-modulated output is converted to D.C. levels changing at predetermined intervals. Here, the changes of the D.C. levels are such that their polarities aare inverted at the predetermined intervals with respect to a D.C. level appearing when no carrier leak exists. A difference between the D.C. levels changing at the predetermined intervals is detected, and a feedback loop is formed for controlling the D.C. level in the automatic clamper using the detected difference. Thus, an encoder circuit eliminating a carrier leak is realized.
Inventors
- 👤 Masahiro Honjo
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 03:46
CPC Classifications
H; H04; H04N; H04N9/00; H04N9/79; H04N9/87; H04N9/8707
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
170 words
An encoder circuit comprising: an automatic clamper for clamping an input signal to a predetermined level according to a control signal; a balanced modulator for balanced-modulating a continuous wave signal in accordance with an output signal from said automatic clamper; a conversion circuit receiving an output signal of said balanced modulator and said continuous wave signal for converting a carrier leak existing in a predetermined period in the output signal of said balanced modulator into changes of D.C. levels whose polarities are inverted at predetermined intervals with respect to a D.C. level appearing when no carrier leak exists; a detection circuit to for detecting a difference between the D.C. levels from said conversion circuit changing at said predetermined intervals, said difference being applied as said control signal to said automatic clamper; and a timing circuit for generating timing signals for controlling said conversion circuit and detection circuit, whereby said automatic clamper controls its clamping level so that said difference between the D.C. levels is minimized, thereby eliminating said carrier leak.
Claim 2
Dependent Claim
170 words
An encoder circuit comprising: an automatic clamper for clamping an input signal to a predetermined level according to a control signal; a balanced modulator for balanced-modulating a continuous wave signal in accordance with an output signal from said automatic clamper; a conversion circuit receiving an output signal of said balanced modulator and said continuous wave signal for converting a carrier leak existing in a predetermined period in the output signal of said balanced modulator into changes of D.C. levels whose polarities are inverted at predetermined intervals with respect to a D.C. level appearing when no carrier leak exists; a detection circuit to for detecting a difference between the D.C. levels from said conversion circuit changing at said predetermined intervals, said difference being applied as said control signal to said automatic clamper; and a timing circuit for generating timing signals for controlling said conversion circuit and detection circuit, whereby said automatic clamper controls its clamping level so that said difference between the D.C. levels is minimized, thereby eliminating said carrier leak.
Claim 3
Dependent Claim
25 words
An encoder circuit according to claim 1, wherein said input signal is a color difference signal and said continuous wave signal is a color subcarrier.
Claim 4
Dependent Claim
23 words
An encoder circuit according to claim 2, wherein said predetermined intervals are intervals of one horizontal scanning period of the color difference signal.
Claim 5
Dependent Claim
21 words
An encoder circuit according to claim 2, wherein said predetermined period is a horizontal blanking interval of the color difference signal.
Claim 6
Dependent Claim
74 words
An encoder circuit according to claim 1, wherein said detection circuit comprises: a low-pass filter for eliminating high frequency components of an output signal of the conversion circuit; two sample-and-hold circuits for sampling and holding an output signal of said low-pass filter according to timing signals from said timing circuit alternately generated at said predetermined intervals; and a comparison circuit for comparing output signals of said two sample-and-hold circuits to produce said control signal.
Claim 7
Dependent Claim
54 words
An encoder circuit according to claim 1, wherein said conversion circuit comprises: a phase inverting circuit for inverting the phase of said continuous wave signal at said predetermined intervals; and a second balanced modulator for balanced-modulating an output signal of said phase inverting circuit in accordance with the output signal of said balanced modulator.
Claim 8
Dependent Claim
24 words
An encoder circuit according to claim 6, wherein said continuous wave signal is inputted to said phase inverting circuit through a phase adjusting circuit.
Claim 9
Dependent Claim
27 words
An encoder circuit according to claim 6, wherein the output signal of said phase inverting circuit is inputted to said second balanced modulator through a bandpass filter.
Claim 10
Dependent Claim
54 words
An encoder circuit according to claim 1, wherein said conversion circuit comprises: a phase inverting circuit for inverting the phase of the output signal of said balanced modulator at said predetermined intervals; and a second balanced modulator for balanced-modulating said continuous wave signal in accordance with an output signal of said phase inverting circuit.
Claim 11
Dependent Claim
27 words
An encoder circuit according to claim 9, wherein the output signal of said balanced modulator is inputted to said phase inverting circuit through a phase adjusting circuit.
Claim 12
Dependent Claim
27 words
An encoder circuit according to claim 9, wherein the output signal of said phase inverting circuit is inputted to said second balanced modulator through a bandpass filter.
Claim 13
Dependent Claim
71 words
An encoder circuit according to claim 1, wherein said conversion circuit comprises: a switching circuit for switching the output signal of said balanced modulator into two lines at said predetermined intervals; and a second balanced modulator to receive the two lines of output signals from said switching circuit as two differential inputs thereto and further to receive said continuous wave signal as another input thereto for making a balanced modulation therewith.
Claim 14
Dependent Claim
26 words
An encoder circuit according to claim 12, wherein the output signal of said balanced modulator is inputted to said switching circuit through a phase adjusting circuit.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1992-04-10 | 1992-10-10 | 1993-04-11 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-04-10 | 1996-10-10 | 1997-04-11 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-04-10 | 2000-10-10 | 2001-04-11 | $7700.00 | Window Closed / Lapsed |