Temperature controller for a transport refrigeration system

Claim 3

The method of claim 1 wherein the step of providing the analog ratio includes the steps of: constructing a voltage divider using a potentiometer having a movable control arm for selecting the set point, and a load temperature sensor, connecting a predetermined regulated control voltage to the control arm, deriving the analog ratio from the voltage divider, and additionally deriving a signal responsive to set point from said voltage divider.

Claim 4

The method of claim 1 wherein the step of converting the analog ratio to a digital signal includes the step of scaling the analog input to provide a digital signal in which each bit change indicates a predetermined change in load temperature, with said predetermined change in load temperature and the total number of possible bit changes in the digital signal providing a temperature range from all logic zeros to all logic ones which is outside the practical range of load temperatures, and including the step of programming the logic array to provide a control signal which indicates load temperature sensor failure in response to a digital signal in which the bits all have the same logic level.

Claim 5

The method of claim 3 including the steps of: deriving a set point temperature output from the voltage divider, providing a heat lock-out reference voltage indicative of a predetermined frozen load temperature below which the use of heat for controlling the load temperature may be prevented, comparing said derived set point temperature output with said heat lock-out reference voltage, and providing a true heat lock-out logic signal when the comparison step indicates the set point temperature selected is below the predetermined heat lock-out temperature represented by the heat lock-out reference voltage.

Claim 6

The method of claim 1 including the step of latching the second in-range signal when it goes true, to preserve said true second in-range signal notwithstanding the first in-range signal subsequently becoming untrue.

Claim 7

The method of claim 5 wherein the at least one predetermined additional timing function which is delayed until the second in-range signal goes true is an out-of-range timing function, and including the steps of: programming the logic array to detect when a true first in-range signal becomes untrue, after the second in-range signal has been latched, timing the duration of an untrue first in-range signal upon detection by said detecting step, and providing a true out-of-range signal in response to the timing step when the untrue first in-range signal persists for a predetermined period of time.

Claim 8

The method of claim 5 wherein the at least one predetermined additional timing function which is delayed until the second in-range signal is provided is a high speed delay function, and including the steps of: programming the logic array to provide true high speed cool, low speed cool, low speed cool unloaded, low speed heat unloaded, and high speed heat delay signals, in the recited order, at predetermined values of the digital signal as the temperature of the load drops to and then below the set point temperature, delaying said high speed heat delay signal until after the second in-range signal has been provided, in the absence of the second in-range signal at the time the high speed heat delay signal would normally be provided, timing the duration of a true high speed heat delay signal, providing a true high speed heat signal after the timing step has timed a predetermined period of time, and providing low speed heat during the delay period.

Claim 9

The method of claim 5 wherein the at least one predetermined additional timing function which is delayed until the second in-range signal is provided is a high speed delay function, and including the steps of: programming the logic array to provide true high speed heat, low speed heat, low speed heat unloaded, low speed cool unloaded, and high speed cool delay signals, in the recited order, at predetermined values of the digital signal as the temperature of the load rises to and then above the set point temperature, delaying said high speed cool delay signal until after the second in-range signal has been provided, in the absence of the second in-range signal at the time the high speed cool delay signal would normally be provided, timing the duration of a true high speed cool delay signal, providing a true high speed cool signal after the timing step has timed a predetermined period of time, and providing low speed cool during the delay period.

Claim 10

A load temperature controller for a transport refrigeration system comprising: selector means for selecting a set point temperature, sensor means for sensing the load temperature of the transport refrigeration system, means for providing an analog ratio between the selected set point temperature and the sensed load temperature, converter means for converting the analog ratio to a digital signal having a predetermined number of bits, logic array means programmed to provide a plurality of transport refrigeration system control signals in response to predetermined values of the digital signal, said logic array means providing a true first in-range signal when the load temperature sensed by the sensor means is within a predetermined temperature range, which range includes the set point temperature selected by the selector means, in-range timer means for timing the duration of the true first in-range signal, said logic array means providing a second in-range signal which goes true in response to said in-range timer means when the first in-range signal remains true for a predetermined period of time, and at least one additional timer for timing a predetermined function of the load temperature controller, said at least one additional timer being enabled by said second in-range signal.

Claim 11

A load temperature controller for a transport refrigeration system comprising: selector means for selecting a set point temperature, sensor means for sensing the load temperature of the transport refrigeration system, means for providing an analog ratio between the selected set point temperature and the sensed load temperature, converter means for converting the analog ratio to a digital signal having a predetermined number of bits, logic array means programmed to provide a plurality of transport refrigeration system control signals in response to predetermined values of the digital signal, said logic array means providing a true first in-range signal when the load temperature sensed by the sensor means is within a predetermined temperature range, which range includes the set point temperature selected by the selector means, in-range timer means for timing the duration of the true first in-range signal, said logic array means providing a second in-range signal which goes true in response to said in-range timer means when the first in-range signal remains true for a predetermined period of time, and at least one additional timer for timing a predetermined function of the load temperature controller, said at least one additional timer being enabled by said second in-range signal.

Claim 12

The controller of claim 9 wherein the selector means includes a potentiometer having a movable control arm for selecting the set point temperature, and the means for providing the analog ratio includes a voltage divider which uses said potentiometer and the sensor means, and including a predetermined regulated control voltage connected to the control arm of said potentiometer, and wherein an indication of the selected set point temperature is also provided by said voltage divider.

Claim 13

The controller of claim 9 wherein the converter means includes analog inputs scaled to provide a digital signal in which each bit change indicates a predetermined change in load temperature, with said predetermined change in load temperature and the total number of possible bit changes in the digital signal providing a temperature range from all logic zeros to all logic ones which is outside the practical range of load temperatures, and wherein the logic array means provides a control signal which indicates failure of the sensor means in response to a digital signal in which the bits all have the same logic level.

Claim 14

The controller of claim 11 including means deriving a set point temperature output from the voltage divider, means providing a heat lock-out reference voltage indicative of a predetermined frozen load temperature below which the use of heat for controlling the load temperature may be prevented, comparator means for comparing said derived set point temperature output with said heat lock-out reference voltage, and means for providing a true heat lock-out logic signal when said comparator means determines the selected set point temperature is below the predetermined heat lock-out temperature represented by the heat lock-out reference voltage.

Claim 15

The controller of claim 9 wherein the logic array means includes means latching the second in-range signal when it goes true, to preserve said true second in-range signal notwithstanding the first in-range signal subsequently becoming untrue.

Claim 16

The controller of claim 13 wherein the at least one additional timer is an out-of-range timer, and wherein the logic array means detects when a true first in-range signal becomes untrue, after the second in-range signal has been latched, and wherein the out-of-range timer times the duration of an untrue first in-range signal upon detection by said detecting step, with said logic array means providing a true out-of-range signal in response to the out-of-range timer when the untrue first in-range signal persists for a predetermined period of time.

Claim 17

The controller of claim 13 wherein the at least one additional timer is a high speed delay timer, and wherein the logic array means provides true high speed cool, low speed cool, low speed cool unloaded, low speed heat unloaded, and high speed heat delay signals, in the recited order, at predetermined values of the digital signal as the temperature of the load drops to and then below the set point temperature, and wherein the high speed delay timer times the duration of a true high speed heat delay signal which follows a true second in-range signal, with the logic array means providing a true high speed heat signal after the high speed delay timer has timed a predetermined period of time.

Claim 18

The controller of claim 13 wherein the at least one additional timer is a high speed delay timer, and wherein the logic array means provides true high speed heat, low speed heat, low speed heat unloaded, low speed cool unloaded, and high speed cool delay signals, in the recited order, at predetermined values of the digital signal as the temperature of the load rises to and then above the set point temperature, and wherein the high speed delay timer times the duration of a true high speed cool delay signal which follows a true second in-range signal, with the logic array means providing a true high speed cool signal after the high speed delay timer has timed a predetermined period of time.