Protection channel monitoring system using a check signal comprising two different N-bit code patterns sequentially arranged at random

Claim 1

In a protection channel monitoring system comprising a transmitter (11, 31) and a receiver (12, 32) coupled with each other by a protection channel (c 1 -c m , 13) for use in a digital communication network, said transmitter (11, 31) comprising check signal generating means (15, 33) for generating a unipolar check signal and a unipolar-to-bipolar converting means (16) for converting said check signal into a bipolar signal to produce an AMI (Alternate-Mark-Inversion) code signal, said AMI code signal being transmitted to said receiver as a plurality of transmission signals through said protection channel, said receiver (12, 32) comprising a plurality of decoding means (24, 37) responsive to said AMI code signals as received through the protection channel for decoding said AMI code signals into NRZ (Non-Return-to-Zero) code signals, to produce decoded NRZ signals (i 1 -i m ), respectively, comparing means (22) for comparing said decoded NRZ signals with one another to produce a coincidence/non-coincidence signal (j), and deciding means (23) responsive to said coincidence/non-coincidence signal for deciding condition of said protection channel, the improvement wherein said check signal generating means (33) comprises: clock pulse generating means (14) for generating a clock pulse signal (a) having a clock frequency (f), a period (1/f) of said clock pulse signal defining one-bit length; frequency dividing means (34) having a dividing ratio of 1/N (N being an integer of 2 or more) for frequency-dividing said clock pulse signal to produce a frequency-divided pulse signal (a'); pseudo random signal generating means (15) responsive to said frequency-divided pulse signal (a') for generating a pseudo random signal (b) having a sufficiently long repetition period, said pseudo random signal comprising N-bit length logical "1" level portions and N-bit length logical "0" level portions sequentially arranged at random; and N-bit pattern converting means (35) responsive to said pseudo random signal (b) for converting each of said N-bit length logical "0" level portions and each of said N-bit length logical "1" level portions into a first predetermined N-bit code pattern comprising logical "0" level and "1" level bits and a second predetermined N-bit code pattern comprising logical "0" level and "1" level bits, respectively, said N-bit pattern converting means (35) producing a pattern converted signal as said unipolar check signal.