US4811155A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Protection circuit for a semiconductor integrated circuit having bipolar transistors
Assignee: Mitsubishi Electric Corp
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Filing: 1988-01-11
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Granted: 1989-03-07
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Expires: 2008-01-11
Abstract
Abstract Two resistors are connected in series between an input bonding electrode and an internal circuit, and respective conducting terminals of a first bipolar transistor are connected between the two resistors and a GND bonding electrode which is connected to the internal circuit. Respective conducting terminals of a second bipolar transistor are connected between the two resistors and a V DD bonding electrode which is connected to the internal circuit. Control terminals of the respective ones of the first and second bipolar transistors are connected to the GND bonding electrode respectively.
Inventors
- 👤 Hirotada Kuriyama
- 👤 Tomohisa Wada
- 👤 Shuuji Murakami
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 02:09
CPC Classifications
H; H10; H10D; H10D89/00; H10D89/60; H10D89/601; H10D89/711; H03; H03K; H03K17/00; H03K17/08; H03K17/081; H03K17/0812; H03K17/08122
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
198 words
A semiconductor integrated circuit having an input node and connected with a power supply terminal and a grounding terminal, a protection circuit comprising: an input terminal voltage drop means connected between said input terminal and said input node of said semiconductor integrated circuit for lowering voltage applied to said input terminal to apply the same to said input node of said semiconductor integrated circuit; a first bipolar transistor connected between a junction of said voltage drop means and said input node of said semiconductor integrated circuit and said grounding terminal to conduct when the voltage applied to said first bipolar transistor exceeds a prescribed voltage level; and a second bipolar transistor connected between said junction and said power supply terminal to conduct when voltage applied to said second bipolar transistor exceeds a prescribed voltage level; wherein said first bipolar transistor has a first conducting terminal connected to said junction and a second conducting terminal and a control terminal connected to said grounding terminal respectively; and said second bipolar transistor has a first conducting terminal connected to said junction, a second conducting terminal connected to said power supply terminal and a control terminal connected to said grounding terminal. PG,19
Claim 2
Dependent Claim
198 words
A semiconductor integrated circuit having an input node and connected with a power supply terminal and a grounding terminal, a protection circuit comprising: an input terminal voltage drop means connected between said input terminal and said input node of said semiconductor integrated circuit for lowering voltage applied to said input terminal to apply the same to said input node of said semiconductor integrated circuit; a first bipolar transistor connected between a junction of said voltage drop means and said input node of said semiconductor integrated circuit and said grounding terminal to conduct when the voltage applied to said first bipolar transistor exceeds a prescribed voltage level; and a second bipolar transistor connected between said junction and said power supply terminal to conduct when voltage applied to said second bipolar transistor exceeds a prescribed voltage level; wherein said first bipolar transistor has a first conducting terminal connected to said junction and a second conducting terminal and a control terminal connected to said grounding terminal respectively; and said second bipolar transistor has a first conducting terminal connected to said junction, a second conducting terminal connected to said power supply terminal and a control terminal connected to said grounding terminal. PG,19
Claim 3
Dependent Claim
50 words
A semiconductor integrated circuit in accordance with claim 1, wherein parasitic resistance by connection of said second conducting terminal of said first bipolar transistor and said grounding terminal is larger than parasitic resistance by connection of said second conducting terminal of said second bipolar transistor and said power supply terminal.
Claim 4
Dependent Claim
23 words
A semiconductor integrated circuit in accordance with claim 1, wherein said first and second bipolar transistors are formed on the same semiconductor substrate.
Claim 5
Dependent Claim
43 words
A semiconductor integrated circuit in accordance with claim 1, further including delay means connected between said junction and said input node of said semiconductor integrated circuit to delay application of said voltage lowered by said voltage drop means to said semiconductor integrated circuit.
Claim 6
Dependent Claim
18 words
A semiconductor integrated circuit in accordance with claim 4, wherein said delay means in a second resistance element.
Claim 7
Dependent Claim
19 words
A semiconductor integrated circuit in accordance with claim 1, wherein said voltage drop means is a first resistance element.
Claim 8
Dependent Claim
218 words
A semiconductor integrated circuit having an input terminal and connected with a power supply terminal and a grounding terminal, a protection circuit comprising: voltage drop means connected between said input terminal and said semiconductor integrated circuit for lowering voltage applied to said input terminal to apply the same to said semiconductor integrated circuit; a first semiconductor control element connected between a junction of said voltage drop means and said semiconductor integrated circuit and said grounding terminal to conduct when said voltage applied to said first semiconductor control element exceeds a prescribed voltage level; a second semiconductor control element connected between said junction and said power supply terminal to conduct when voltage applied to said second semiconductor control element exceeds a prescribed voltage level; said first semiconductor control element comprising a first bipolar transistor having a first conducting terminal connected to said junction and a second conducting terminal and a control terminal connected to said grounding terminal respectively; said second semiconductor control element comprising a second bipolar transistor having a first conducting terminal connected to said junction, a second conducting terminal connected to said power supply terminal and a control terminal connected to said grounding terminal; said first and second bipolar transistors being formed on the same semiconductor substrate; said first and second bipolar transistors being of NPN type.
Claim 9
Dependent Claim
218 words
A semiconductor integrated circuit having an input terminal and connected with a power supply terminal and a grounding terminal, a protection circuit comprising: voltage drop means connected between said input terminal and said semiconductor integrated circuit for lowering voltage applied to said input terminal to apply the same to said semiconductor integrated circuit; a first semiconductor control element connected between a junction of said voltage drop means and said semiconductor integrated circuit and said grounding terminal to conduct when said voltage applied to said first semiconductor control element exceeds a prescribed voltage level; a second semiconductor control element connected between said junction and said power supply terminal to conduct when voltage applied to said second semiconductor control element exceeds a prescribed voltage level; said first semiconductor control element comprising a first bipolar transistor having a first conducting terminal connected to said junction and a second conducting terminal and a control terminal connected to said grounding terminal respectively; said second semiconductor control element comprising a second bipolar transistor having a first conducting terminal connected to said junction, a second conducting terminal connected to said power supply terminal and a control terminal connected to said grounding terminal; said first and second bipolar transistors being formed on the same semiconductor substrate; said first and second bipolar transistors being of NPN type.
Claim 10
Dependent Claim
39 words
A semiconductor integrated circuit in accordance with claim 7, wherein said first conducting terminal of said first bipolar transistor and said first conducting terminal of said second bipolar transistor are the same impurity region formed on said semiconductor substrate.
References Cited (Backward Citations)
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| 3.5 Years (Year 4) | 1992-03-06 | 1992-09-05 | 1993-03-07 | $2000.00 | Window Closed / Lapsed |
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